Cylone V Starter Kit Configuration

Pin Assignments:

CLOCK

LED

KEY

I2C for Audio/HDMI-TX/Si5338/HSMC

Pin Assignment Table:

CLOCK
Name	Location	Direction	Standard
CLOCK_125_p	U12	input	LVDS
CLOCK_50_B3B	T13	input	1.2 V
CLOCK_50_B5B	R20	input	3.3-V LVTTL
CLOCK_50_B6A	N20	input	3.3-V LVTTL
CLOCK_50_B7A	H12	input	2.5 V
CLOCK_50_B8A	M10	input	2.5 V

LED
Name	Location	Direction	Standard
LEDG[0]	L7	output	2.5 V
LEDG[1]	K6	output	2.5 V
LEDG[2]	D8	output	2.5 V
LEDG[3]	E9	output	2.5 V
LEDG[4]	A5	output	2.5 V
LEDG[5]	B6	output	2.5 V
LEDG[6]	H8	output	2.5 V
LEDG[7]	H9	output	2.5 V
LEDR[0]	F7	output	2.5 V
LEDR[1]	F6	output	2.5 V
LEDR[2]	G6	output	2.5 V
LEDR[3]	G7	output	2.5 V
LEDR[4]	J8	output	2.5 V
LEDR[5]	J7	output	2.5 V
LEDR[6]	K10	output	2.5 V
LEDR[7]	K8	output	2.5 V
LEDR[8]	H7	output	2.5 V
LEDR[9]	J10	output	2.5 V

KEY
Name	Location	Direction	Standard
KEY[0]	P11	input	1.2 V
KEY[1]	P12	input	1.2 V
KEY[2]	Y15	input	1.2 V
KEY[3]	Y16	input	1.2 V
CPU_RESET_n	AB24	input	3.3-V LVTTL

SW
Name	Location	Direction	Standard
SW[0]	AC9	input	1.2 V
SW[1]	AE10	input	1.2 V
SW[2]	AD13	input	1.2 V
SW[3]	AC8	input	1.2 V
SW[4]	W11	input	1.2 V
SW[5]	AB10	input	1.2 V
SW[6]	V10	input	1.2 V
SW[7]	AC10	input	1.2 V
SW[8]	Y11	input	1.2 V
SW[9]	AE19	input	1.2 V

SEG7
Name	Location	Direction	Standard
HEX0[0]	V19	output	1.2 V
HEX0[1]	V18	output	1.2 V
HEX0[2]	V17	output	1.2 V
HEX0[3]	W18	output	1.2 V
HEX0[4]	Y20	output	1.2 V
HEX0[5]	Y19	output	1.2 V
HEX0[6]	Y18	output	1.2 V
HEX1[0]	AA18	output	1.2 V
HEX1[1]	AD26	output	1.2 V
HEX1[2]	AB19	output	1.2 V
HEX1[3]	AE26	output	1.2 V
HEX1[4]	AE25	output	1.2 V
HEX1[5]	AC19	output	1.2 V
HEX1[6]	AF24	output	1.2 V

HDMI-TX
Name	Location	Direction	Standard
HDMI_TX_HS	U26	output	3.3-V LVTTL
HDMI_TX_VS	U25	output	3.3-V LVTTL
HDMI_TX_CLK	Y25	output	3.3-V LVTTL
HDMI_TX_DE	Y26	output	3.3-V LVTTL
HDMI_TX_INT	T12	input	1.2 V
HDMI_TX_D[0]	V23	output	3.3-V LVTTL
HDMI_TX_D[1]	AA26	output	3.3-V LVTTL
HDMI_TX_D[2]	W25	output	3.3-V LVTTL
HDMI_TX_D[3]	W26	output	3.3-V LVTTL
HDMI_TX_D[4]	V24	output	3.3-V LVTTL
HDMI_TX_D[5]	V25	output	3.3-V LVTTL
HDMI_TX_D[6]	U24	output	3.3-V LVTTL
HDMI_TX_D[7]	T23	output	3.3-V LVTTL
HDMI_TX_D[8]	T24	output	3.3-V LVTTL
HDMI_TX_D[9]	T26	output	3.3-V LVTTL
HDMI_TX_D[10]	R23	output	3.3-V LVTTL
HDMI_TX_D[11]	R25	output	3.3-V LVTTL
HDMI_TX_D[12]	P22	output	3.3-V LVTTL
HDMI_TX_D[13]	P23	output	3.3-V LVTTL
HDMI_TX_D[14]	N25	output	3.3-V LVTTL
HDMI_TX_D[15]	P26	output	3.3-V LVTTL
HDMI_TX_D[16]	P21	output	3.3-V LVTTL
HDMI_TX_D[17]	R24	output	3.3-V LVTTL
HDMI_TX_D[18]	R26	output	3.3-V LVTTL
HDMI_TX_D[19]	AB26	output	3.3-V LVTTL
HDMI_TX_D[20]	AA24	output	3.3-V LVTTL
HDMI_TX_D[21]	AB25	output	3.3-V LVTTL
HDMI_TX_D[22]	AC25	output	3.3-V LVTTL
HDMI_TX_D[23]	AD25	output	3.3-V LVTTL

ADC SPI
Name	Location	Direction	Standard
ADC_CONVST	AB22	output	1.2 V
ADC_SCK	AA21	output	1.2 V
ADC_SDI	Y10	output	1.2 V
ADC_SDO	W10	input	1.2 V

Audio
Name	Location	Direction	Standard
AUD_ADCLRCK	C7	inout	2.5 V
AUD_ADCDAT	D7	input	2.5 V
AUD_DACLRCK	G10	inout	2.5 V
AUD_DACDAT	H10	output	2.5 V
AUD_XCK	D6	output	2.5 V
AUD_BCLK	E6	inout	2.5 V

I2C for Audio/HDMI-TX/Si5338/HSMC
Name	Location	Direction	Standard
I2C_SCL	B7	output	2.5 V
I2C_SDA	G11	inout	2.5 V

SDCARD
Name	Location	Direction	Standard
SD_CMD	W8	inout	3.3-V LVTTL
SD_CLK	AB6	output	3.3-V LVTTL
SD_DAT[0]	U7	inout	3.3-V LVTTL
SD_DAT[1]	T7	inout	3.3-V LVTTL
SD_DAT[2]	V8	inout	3.3-V LVTTL
SD_DAT[3]	T8	inout	3.3-V LVTTL

Uart to USB
Name	Location	Direction	Standard
UART_TX	L9	output	2.5 V
UART_RX	M9	input	2.5 V

SRAM
Name	Location	Direction	Standard
SRAM_A[0]	B25	output	3.3-V LVTTL
SRAM_A[1]	B26	output	3.3-V LVTTL
SRAM_A[2]	H19	output	3.3-V LVTTL
SRAM_A[3]	H20	output	3.3-V LVTTL
SRAM_A[4]	D25	output	3.3-V LVTTL
SRAM_A[5]	C25	output	3.3-V LVTTL
SRAM_A[6]	J20	output	3.3-V LVTTL
SRAM_A[7]	J21	output	3.3-V LVTTL
SRAM_A[8]	D22	output	3.3-V LVTTL
SRAM_A[9]	E23	output	3.3-V LVTTL
SRAM_A[10]	G20	output	3.3-V LVTTL
SRAM_A[11]	F21	output	3.3-V LVTTL
SRAM_A[12]	E21	output	3.3-V LVTTL
SRAM_A[13]	F22	output	3.3-V LVTTL
SRAM_A[14]	J25	output	3.3-V LVTTL
SRAM_A[15]	J26	output	3.3-V LVTTL
SRAM_A[16]	N24	output	3.3-V LVTTL
SRAM_A[17]	M24	output	3.3-V LVTTL
SRAM_D[0]	E24	inout	3.3-V LVTTL
SRAM_D[1]	E25	inout	3.3-V LVTTL
SRAM_D[2]	K24	inout	3.3-V LVTTL
SRAM_D[3]	K23	inout	3.3-V LVTTL
SRAM_D[4]	F24	inout	3.3-V LVTTL
SRAM_D[5]	G24	inout	3.3-V LVTTL
SRAM_D[6]	L23	inout	3.3-V LVTTL
SRAM_D[7]	L24	inout	3.3-V LVTTL
SRAM_D[8]	H23	inout	3.3-V LVTTL
SRAM_D[9]	H24	inout	3.3-V LVTTL
SRAM_D[10]	H22	inout	3.3-V LVTTL
SRAM_D[11]	J23	inout	3.3-V LVTTL
SRAM_D[12]	F23	inout	3.3-V LVTTL
SRAM_D[13]	G22	inout	3.3-V LVTTL
SRAM_D[14]	L22	inout	3.3-V LVTTL
SRAM_D[15]	K21	inout	3.3-V LVTTL
SRAM_UB_n	M25	output	3.3-V LVTTL
SRAM_LB_n	H25	output	3.3-V LVTTL
SRAM_CE_n	N23	output	3.3-V LVTTL
SRAM_OE_n	M22	output	3.3-V LVTTL
SRAM_WE_n	G25	output	3.3-V LVTTL

LPDDR2
Name	Location	Direction	Standard
DDR2LP_CK_p	N10	output	Differential 1.2-V HSUL
DDR2LP_CK_n	P10	output	Differential 1.2-V HSUL
DDR2LP_DQS_p[0]	V13	inout	Differential 1.2-V HSUL
DDR2LP_DQS_n[0]	W13	inout	Differential 1.2-V HSUL
DDR2LP_DQS_p[1]	U14	inout	Differential 1.2-V HSUL
DDR2LP_DQS_n[1]	V14	inout	Differential 1.2-V HSUL
DDR2LP_DQS_p[2]	V15	inout	Differential 1.2-V HSUL
DDR2LP_DQS_n[2]	W15	inout	Differential 1.2-V HSUL
DDR2LP_DQS_p[3]	W16	inout	Differential 1.2-V HSUL
DDR2LP_DQS_n[3]	W17	inout	Differential 1.2-V HSUL
DDR2LP_CKE[0]	AF14	output	1.2-V HSUL
DDR2LP_CKE[1]	AE13	output	1.2-V HSUL
DDR2LP_CS_n[0]	R11	output	1.2-V HSUL
DDR2LP_CS_n[1]	T11	output	1.2-V HSUL
DDR2LP_DM[0]	AF11	output	1.2-V HSUL
DDR2LP_DM[1]	AE18	output	1.2-V HSUL
DDR2LP_DM[2]	AE20	output	1.2-V HSUL
DDR2LP_DM[3]	AE24	output	1.2-V HSUL
DDR2LP_OCT_RZQ	AE11	input	1.2 V
DDR2LP_DQ[0]	AA14	inout	1.2-V HSUL
DDR2LP_DQ[1]	Y14	inout	1.2-V HSUL
DDR2LP_DQ[2]	AD11	inout	1.2-V HSUL
DDR2LP_DQ[3]	AD12	inout	1.2-V HSUL
DDR2LP_DQ[4]	Y13	inout	1.2-V HSUL
DDR2LP_DQ[5]	W12	inout	1.2-V HSUL
DDR2LP_DQ[6]	AD10	inout	1.2-V HSUL
DDR2LP_DQ[7]	AF12	inout	1.2-V HSUL
DDR2LP_DQ[8]	AC15	inout	1.2-V HSUL
DDR2LP_DQ[9]	AB15	inout	1.2-V HSUL
DDR2LP_DQ[10]	AC14	inout	1.2-V HSUL
DDR2LP_DQ[11]	AF13	inout	1.2-V HSUL
DDR2LP_DQ[12]	AB16	inout	1.2-V HSUL
DDR2LP_DQ[13]	AA16	inout	1.2-V HSUL
DDR2LP_DQ[14]	AE14	inout	1.2-V HSUL
DDR2LP_DQ[15]	AF18	inout	1.2-V HSUL
DDR2LP_DQ[16]	AD16	inout	1.2-V HSUL
DDR2LP_DQ[17]	AD17	inout	1.2-V HSUL
DDR2LP_DQ[18]	AC18	inout	1.2-V HSUL
DDR2LP_DQ[19]	AF19	inout	1.2-V HSUL
DDR2LP_DQ[20]	AC17	inout	1.2-V HSUL
DDR2LP_DQ[21]	AB17	inout	1.2-V HSUL
DDR2LP_DQ[22]	AF21	inout	1.2-V HSUL
DDR2LP_DQ[23]	AE21	inout	1.2-V HSUL
DDR2LP_DQ[24]	AE15	inout	1.2-V HSUL
DDR2LP_DQ[25]	AE16	inout	1.2-V HSUL
DDR2LP_DQ[26]	AC20	inout	1.2-V HSUL
DDR2LP_DQ[27]	AD21	inout	1.2-V HSUL
DDR2LP_DQ[28]	AF16	inout	1.2-V HSUL
DDR2LP_DQ[29]	AF17	inout	1.2-V HSUL
DDR2LP_DQ[30]	AD23	inout	1.2-V HSUL
DDR2LP_DQ[31]	AF23	inout	1.2-V HSUL
DDR2LP_CA[0]	AE6	output	1.2-V HSUL
DDR2LP_CA[1]	AF6	output	1.2-V HSUL
DDR2LP_CA[2]	AF7	output	1.2-V HSUL
DDR2LP_CA[3]	AF8	output	1.2-V HSUL
DDR2LP_CA[4]	U10	output	1.2-V HSUL
DDR2LP_CA[5]	U11	output	1.2-V HSUL
DDR2LP_CA[6]	AE9	output	1.2-V HSUL
DDR2LP_CA[7]	AF9	output	1.2-V HSUL
DDR2LP_CA[8]	AB12	output	1.2-V HSUL
DDR2LP_CA[9]	AB11	output	1.2-V HSUL