pcie_ed |
|
2020.07.10.10:36:37 | Datasheet |
BAR_INTERPRETER | dut | |||
bri_master | p0_wrdm_master | p0_rddm_master | p0_bam_master | |
BAR_INTERPRETER | ||||
bri_slave | 0x00000000 | |||
DMA_CONTROLLER | ||||
dma_slave | 0x00000000 | 0x00000000 | ||
dma_msix_slave | 0x02000000 | |||
emif_fm_ddr4a | ||||
ctrl_amm_0 | 0x0000001000000000 | 0x0000001000000000 | ||
emif_fm_ddr4b | ||||
ctrl_amm_0 | 0x0000001200000000 | 0x0000001200000000 | ||
emif_fm_ddr4c | ||||
ctrl_amm_0 | 0x0000001400000000 | 0x0000001400000000 | ||
emif_fm_ddr4d | ||||
ctrl_amm_0 | 0x0000001600000000 | 0x0000001600000000 | ||
mem | ||||
s1 | 0x00100000 | |||
s2 | 0x04100000 | 0x00100000 | ||
pio_button | ||||
s1 | 0x04800040 | |||
pio_led | ||||
s1 | 0x04800000 |
dut | p0_bam_master | BAR_INTERPRETER | |
bri_slave | |||
p0_app_clk | |||
clk | |||
p0_bam_conduit | |||
bri_conduit | |||
p0_app_reset_status_n | |||
reset | |||
bri_master | DMA_CONTROLLER | ||
dma_msix_slave | |||
bri_master | |||
dma_slave | |||
bri_master | mm_bridge_bar4 | ||
s0 |
Parameters
|
Software Assignments(none) |
BAR_INTERPRETER | bri_master | DMA_CONTROLLER | |
dma_msix_slave | |||
bri_master | |||
dma_slave | |||
mm_bridge_dma_controller | m0 | ||
dma_slave | |||
dut | p0_rddm_tx | ||
rddm_tx | |||
p0_wrdm_tx | |||
wrdm_tx | |||
p0_app_clk | |||
clk | |||
p0_rddm_conduit | |||
rddm_conduit | |||
p0_wrdm_conduit | |||
wrdm_conduit | |||
p0_app_reset_status_n | |||
reset | |||
rddm_desc | dut | ||
p0_rddm_desc | |||
rddm_prio | |||
p0_rddm_prio | |||
wrdm_desc | |||
p0_wrdm_desc | |||
wrdm_prio | |||
p0_wrdm_prio |
Parameters
|
Software Assignments(none) |
DMA_CONTROLLER | rddm_desc | dut | |
p0_rddm_desc | |||
rddm_prio | |||
p0_rddm_prio | |||
wrdm_desc | |||
p0_wrdm_desc | |||
wrdm_prio | |||
p0_wrdm_prio | |||
resetIP | ninit_done | ||
ninit_done | |||
p0_bam_master | BAR_INTERPRETER | ||
bri_slave | |||
p0_app_clk | |||
clk | |||
p0_bam_conduit | |||
bri_conduit | |||
p0_app_reset_status_n | |||
reset | |||
p0_rddm_master | mm_bridge_onchip_mem | ||
s0 | |||
p0_app_clk | |||
clk | |||
p0_app_reset_status_n | |||
reset | |||
p0_rddm_master | mm_bridge_dma_controller | ||
s0 | |||
p0_app_clk | |||
clk | |||
p0_app_reset_status_n | |||
reset | |||
p0_rddm_master | mm_bridge_pcie_rd | ||
s0 | |||
p0_app_clk | |||
clk | |||
p0_app_reset_status_n | |||
reset | |||
p0_wrdm_master | mm_bridge_pcie_rdwr | ||
s0 | |||
p0_app_clk | |||
clk | |||
p0_app_reset_status_n | |||
reset | |||
p0_wrdm_master | mem | ||
s1 | |||
p0_app_clk | |||
clk1 | |||
p0_app_reset_status_n | |||
reset1 | |||
p0_rddm_tx | DMA_CONTROLLER | ||
rddm_tx | |||
p0_wrdm_tx | |||
wrdm_tx | |||
p0_app_clk | |||
clk | |||
p0_rddm_conduit | |||
rddm_conduit | |||
p0_wrdm_conduit | |||
wrdm_conduit | |||
p0_app_reset_status_n | |||
reset | |||
p0_app_clk | pio_led | ||
clk | |||
p0_app_reset_status_n | |||
reset | |||
p0_app_clk | pio_button | ||
clk | |||
p0_app_reset_status_n | |||
reset | |||
p0_app_clk | mm_bridge_bar4 | ||
clk | |||
p0_app_reset_status_n | |||
reset | |||
p0_app_clk | mm_clock_crossing_bridge_ddr4c | ||
s0_clk | |||
p0_app_reset_status_n | |||
s0_reset | |||
p0_app_clk | mm_clock_crossing_bridge_ddr4d | ||
s0_clk | |||
p0_app_reset_status_n | |||
s0_reset | |||
p0_app_clk | mm_clock_crossing_bridge_ddr4b | ||
s0_clk | |||
p0_app_reset_status_n | |||
s0_reset | |||
p0_app_clk | mm_clock_crossing_bridge_ddr4a | ||
s0_clk | |||
p0_app_reset_status_n | |||
s0_reset |
Parameters
|
Software Assignments(none) |
emif_fm_ddr4a | emif_calbus | emif_cal_ab | |
emif_calbus_0 | |||
emif_calbus_clk | emif_fm_ddr4a | ||
emif_calbus_clk | |||
emif_calbus_clk | emif_fm_ddr4b | ||
emif_calbus_clk | |||
emif_calbus_1 | |||
emif_calbus |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
mm_bridge_ddr4a_1 | m0 | emif_fm_ddr4a | |
ctrl_amm_0 | |||
emif_cal_ab | emif_calbus_clk | ||
emif_calbus_clk | |||
emif_usr_clk | mm_bridge_ddr4a_1 | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
emif_usr_clk | mm_bridge_ddr4a_0 | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
emif_usr_clk | mm_clock_crossing_bridge_ddr4a | ||
m0_clk | |||
emif_usr_reset_n | |||
m0_reset | |||
emif_calbus | emif_cal_ab | ||
emif_calbus_0 |
Parameters
|
Software Assignments(none) |
mm_bridge_ddr4b_1 | m0 | emif_fm_ddr4b | |
ctrl_amm_0 | |||
emif_cal_ab | emif_calbus_clk | ||
emif_calbus_clk | |||
emif_calbus_1 | |||
emif_calbus | |||
emif_usr_clk | mm_bridge_ddr4b_1 | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
emif_usr_clk | mm_bridge_ddr4b_0 | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
emif_usr_clk | mm_clock_crossing_bridge_ddr4b | ||
m0_clk | |||
emif_usr_reset_n | |||
m0_reset |
Parameters
|
Software Assignments(none) |
mm_bridge_ddr4c_1 | m0 | emif_fm_ddr4c | |
ctrl_amm_0 | |||
emif_cal_cd | emif_calbus_clk | ||
emif_calbus_clk | |||
emif_calbus_0 | |||
emif_calbus | |||
emif_usr_clk | mm_bridge_ddr4c_1 | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
emif_usr_clk | mm_bridge_ddr4c_0 | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
emif_usr_clk | mm_clock_crossing_bridge_ddr4c | ||
m0_clk | |||
emif_usr_reset_n | |||
m0_reset |
Parameters
|
Software Assignments(none) |
mm_bridge_ddr4d_1 | m0 | emif_fm_ddr4d | |
ctrl_amm_0 | |||
emif_cal_cd | emif_calbus_clk | ||
emif_calbus_clk | |||
emif_calbus_1 | |||
emif_calbus | |||
emif_usr_clk | mm_bridge_ddr4d_1 | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
emif_usr_clk | mm_bridge_ddr4d_0 | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
emif_usr_clk | mm_clock_crossing_bridge_ddr4d | ||
m0_clk | |||
emif_usr_reset_n | |||
m0_reset |
Parameters
|
Software Assignments(none) |
mm_bridge_bar4 | m0 | mem |
s2 | ||
mm_bridge_onchip_mem | m0 | |
s2 | ||
dut | p0_wrdm_master | |
s1 | ||
p0_app_clk | ||
clk1 | ||
p0_app_reset_status_n | ||
reset1 |
Parameters
|
Software Assignments
|
BAR_INTERPRETER | bri_master | mm_bridge_bar4 | |
s0 | |||
dut | p0_app_clk | ||
clk | |||
p0_app_reset_status_n | |||
reset | |||
m0 | pio_led | ||
s1 | |||
m0 | pio_button | ||
s1 | |||
m0 | mem | ||
s2 |
Parameters
|
Software Assignments(none) |
mm_clock_crossing_bridge_ddr4a | m0 | mm_bridge_ddr4a_0 | |
s0 | |||
emif_fm_ddr4a | emif_usr_clk | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
m0 | mm_bridge_ddr4a_1 | ||
s0 |
Parameters
|
Software Assignments(none) |
mm_bridge_ddr4a_0 | m0 | mm_bridge_ddr4a_1 | |
s0 | |||
emif_fm_ddr4a | emif_usr_clk | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
m0 | emif_fm_ddr4a | ||
ctrl_amm_0 |
Parameters
|
Software Assignments(none) |
mm_clock_crossing_bridge_ddr4b | m0 | mm_bridge_ddr4b_0 | |
s0 | |||
emif_fm_ddr4b | emif_usr_clk | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
m0 | mm_bridge_ddr4b_1 | ||
s0 |
Parameters
|
Software Assignments(none) |
mm_bridge_ddr4b_0 | m0 | mm_bridge_ddr4b_1 | |
s0 | |||
emif_fm_ddr4b | emif_usr_clk | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
m0 | emif_fm_ddr4b | ||
ctrl_amm_0 |
Parameters
|
Software Assignments(none) |
mm_clock_crossing_bridge_ddr4c | m0 | mm_bridge_ddr4c_0 | |
s0 | |||
emif_fm_ddr4c | emif_usr_clk | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
m0 | mm_bridge_ddr4c_1 | ||
s0 |
Parameters
|
Software Assignments(none) |
mm_bridge_ddr4c_0 | m0 | mm_bridge_ddr4c_1 | |
s0 | |||
emif_fm_ddr4c | emif_usr_clk | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
m0 | emif_fm_ddr4c | ||
ctrl_amm_0 |
Parameters
|
Software Assignments(none) |
mm_clock_crossing_bridge_ddr4d | m0 | mm_bridge_ddr4d_0 | |
s0 | |||
emif_fm_ddr4d | emif_usr_clk | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
m0 | mm_bridge_ddr4d_1 | ||
s0 |
Parameters
|
Software Assignments(none) |
mm_bridge_ddr4d_0 | m0 | mm_bridge_ddr4d_1 | |
s0 | |||
emif_fm_ddr4d | emif_usr_clk | ||
clk | |||
emif_usr_reset_n | |||
reset | |||
m0 | emif_fm_ddr4d | ||
ctrl_amm_0 |
Parameters
|
Software Assignments(none) |
dut | p0_rddm_master | mm_bridge_dma_controller | |
s0 | |||
p0_app_clk | |||
clk | |||
p0_app_reset_status_n | |||
reset | |||
m0 | DMA_CONTROLLER | ||
dma_slave |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
dut | p0_rddm_master | mm_bridge_pcie_rd | |
s0 | |||
p0_app_clk | |||
clk | |||
p0_app_reset_status_n | |||
reset | |||
m0 | mm_bridge_pcie_rdwr | ||
s0 |
Parameters
|
Software Assignments(none) |
mm_bridge_pcie_rd | m0 | mm_bridge_pcie_rdwr | |
s0 | |||
dut | p0_wrdm_master | ||
s0 | |||
p0_app_clk | |||
clk | |||
p0_app_reset_status_n | |||
reset | |||
m0 | mm_clock_crossing_bridge_ddr4a | ||
s0 | |||
m0 | mm_clock_crossing_bridge_ddr4b | ||
s0 | |||
m0 | mm_clock_crossing_bridge_ddr4c | ||
s0 | |||
m0 | mm_clock_crossing_bridge_ddr4d | ||
s0 |
Parameters
|
Software Assignments(none) |
mm_bridge_pcie_rdwr | m0 | mm_clock_crossing_bridge_ddr4a | |
s0 | |||
emif_fm_ddr4a | emif_usr_clk | ||
m0_clk | |||
emif_usr_reset_n | |||
m0_reset | |||
dut | p0_app_clk | ||
s0_clk | |||
p0_app_reset_status_n | |||
s0_reset | |||
m0 | mm_bridge_ddr4a_0 | ||
s0 |
Parameters
|
Software Assignments(none) |
mm_bridge_pcie_rdwr | m0 | mm_clock_crossing_bridge_ddr4b | |
s0 | |||
emif_fm_ddr4b | emif_usr_clk | ||
m0_clk | |||
emif_usr_reset_n | |||
m0_reset | |||
dut | p0_app_clk | ||
s0_clk | |||
p0_app_reset_status_n | |||
s0_reset | |||
m0 | mm_bridge_ddr4b_0 | ||
s0 |
Parameters
|
Software Assignments(none) |
mm_bridge_pcie_rdwr | m0 | mm_clock_crossing_bridge_ddr4c | |
s0 | |||
emif_fm_ddr4c | emif_usr_clk | ||
m0_clk | |||
emif_usr_reset_n | |||
m0_reset | |||
dut | p0_app_clk | ||
s0_clk | |||
p0_app_reset_status_n | |||
s0_reset | |||
m0 | mm_bridge_ddr4c_0 | ||
s0 |
Parameters
|
Software Assignments(none) |
mm_bridge_pcie_rdwr | m0 | mm_clock_crossing_bridge_ddr4d | |
s0 | |||
emif_fm_ddr4d | emif_usr_clk | ||
m0_clk | |||
emif_usr_reset_n | |||
m0_reset | |||
dut | p0_app_clk | ||
s0_clk | |||
p0_app_reset_status_n | |||
s0_reset | |||
m0 | mm_bridge_ddr4d_0 | ||
s0 |
Parameters
|
Software Assignments(none) |
mm_bridge_bar4 | m0 | pio_button |
s1 | ||
dut | p0_app_clk | |
clk | ||
p0_app_reset_status_n | ||
reset |
Parameters
|
Software Assignments
|
mm_bridge_bar4 | m0 | pio_led |
s1 | ||
dut | p0_app_clk | |
clk | ||
p0_app_reset_status_n | ||
reset |
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments(none) |
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