Generation Report - Triple Speed Ethernet MegaCore Function v10.0 |
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Entity Name | altera_tse_mac | Variation Name | tse_mac | Variation HDL | Verilog HDL | Output Directory | D:\DaughterBoard\NET\Examples\QB3\QB3_NET_GMII_NET0 |
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File SummaryThe MegaWizard interface is creating the following files in the output directory: |
File | Description |
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tse_mac.v | A MegaCore® function variation file, which defines a Verilog HDL top-level description of the custom MegaCore function. Instantiate the entity defined by this file inside of your design. Include this file when compiling your design in the Quartus II software. | tse_mac.qip | Contains Quartus II project information for your MegaCore function variation. | tse_mac.html | The MegaCore function report file. |
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MegaCore Function Variation File PortsName | Direction | Width |
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ff_tx_data | INPUT | 32 | ff_tx_eop | INPUT | 1 | ff_tx_err | INPUT | 1 | ff_tx_mod | INPUT | 2 | ff_tx_rdy | OUTPUT | 1 | ff_tx_sop | INPUT | 1 | ff_tx_wren | INPUT | 1 | ff_tx_clk | INPUT | 1 | ff_rx_data | OUTPUT | 32 | ff_rx_dval | OUTPUT | 1 | ff_rx_eop | OUTPUT | 1 | ff_rx_mod | OUTPUT | 2 | ff_rx_rdy | INPUT | 1 | ff_rx_sop | OUTPUT | 1 | rx_err | OUTPUT | 6 | ff_rx_clk | INPUT | 1 | address | INPUT | 8 | readdata | OUTPUT | 32 | read | INPUT | 1 | writedata | INPUT | 32 | write | INPUT | 1 | waitrequest | OUTPUT | 1 | clk | INPUT | 1 | reset | INPUT | 1 | gm_rx_d | INPUT | 8 | gm_rx_dv | INPUT | 1 | gm_rx_err | INPUT | 1 | gm_tx_d | OUTPUT | 8 | gm_tx_en | OUTPUT | 1 | gm_tx_err | OUTPUT | 1 | m_rx_d | INPUT | 4 | m_rx_en | INPUT | 1 | m_rx_err | INPUT | 1 | m_tx_d | OUTPUT | 4 | m_tx_en | OUTPUT | 1 | m_tx_err | OUTPUT | 1 | m_rx_col | INPUT | 1 | m_rx_crs | INPUT | 1 | tx_clk | INPUT | 1 | rx_clk | INPUT | 1 | set_10 | INPUT | 1 | set_1000 | INPUT | 1 | ena_10 | OUTPUT | 1 | eth_mode | OUTPUT | 1 | mdio_out | OUTPUT | 1 | mdio_oen | OUTPUT | 1 | mdio_in | INPUT | 1 | mdc | OUTPUT | 1 |
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