DE4 FPGA Board Configuration



Pin Assignments:




Pin Assignment Table:



CLOCK
Name Location Direction Standard
OSC_50_BANK2 AC35 input 2.5 V
OSC_50_BANK3 AV22 input 1.8 V
OSC_50_BANK4 AV19 input 1.8 V
OSC_50_BANK5 AC6 input 3.0-V PCI-X
OSC_50_BANK6 AB6 input 2.5 V
OSC_50_BANK7 A19 input 1.8 V
GCLKOUT_FPGA AH19 output 1.8 V
GCLKIN A21 input 1.8 V
PLL_CLKIN_p B22 input LVDS



LED x 8
Name Location Direction Standard
LED[0] V28 output 2.5 V
LED[1] W28 output 2.5 V
LED[2] R29 output 2.5 V
LED[3] P29 output 2.5 V
LED[4] N29 output 2.5 V
LED[5] M29 output 2.5 V
LED[6] M30 output 2.5 V
LED[7] N30 output 2.5 V



BUTTON x 4, EXT_IO and CPU_RESET_n
Name Location Direction Standard
BUTTON[0] AH5 input 3.0-V PCI-X
BUTTON[1] AG5 input 3.0-V PCI-X
BUTTON[2] AG7 input 3.0-V PCI-X
BUTTON[3] AG8 input 3.0-V PCI-X
EXT_IO AC11 inout 3.0-V PCI-X
CPU_RESET_n V34 input 2.5 V



DIP SWITCH x 8
Name Location Direction Standard
SW[0] AB13 input 3.0-V PCI-X
SW[1] AB12 input 3.0-V PCI-X
SW[2] AB11 input 3.0-V PCI-X
SW[3] AB10 input 3.0-V PCI-X
SW[4] AB9 input 3.0-V PCI-X
SW[5] AC8 input 3.0-V PCI-X
SW[6] AH6 input 3.0-V PCI-X
SW[7] AG6 input 3.0-V PCI-X



SLIDE SWITCH x 4
Name Location Direction Standard
SLIDE_SW[0] J7 input 2.5 V
SLIDE_SW[1] K7 input 2.5 V
SLIDE_SW[2] AK6 input 3.0-V PCI-X
SLIDE_SW[3] L7 input 2.5 V



SEG7
Name Location Direction Standard
SEG0_D[0] L34 output 2.5 V
SEG0_D[1] M34 output 2.5 V
SEG0_D[2] M33 output 2.5 V
SEG0_D[3] H31 output 2.5 V
SEG0_D[4] J33 output 2.5 V
SEG0_D[5] L35 output 2.5 V
SEG0_D[6] K32 output 2.5 V
SEG0_DP AL34 output 2.5 V
SEG1_D[0] E31 output 2.5 V
SEG1_D[1] F31 output 2.5 V
SEG1_D[2] G31 output 2.5 V
SEG1_D[3] C34 output 2.5 V
SEG1_D[4] C33 output 2.5 V
SEG1_D[5] D33 output 2.5 V
SEG1_D[6] D34 output 2.5 V
SEG1_DP AL35 output 2.5 V



Fan
Name Location Direction Standard
FAN_CTRL AP20 output 1.8 V