PLL_Name	PLL0:sys_pll_inst|altpll:altpll_component|PLL0_altpll:auto_generated|pll1
PLLJITTER	30
PLLSPEmax	40
PLLSPEmin	-40

PLL_Name	TR4_QSYS:u0|TR4_QSYS_uniphy_ddr3:uniphy_ddr3|TR4_QSYS_uniphy_ddr3_p0:p0|TR4_QSYS_uniphy_ddr3_p0_controller_phy:controller_phy_inst|TR4_QSYS_uniphy_ddr3_p0_memphy_top:memphy_top_inst|TR4_QSYS_uniphy_ddr3_p0_pll_memphy:upll_memphy|altpll:altpll_component|TR4_QSYS_uniphy_ddr3_p0_pll_memphy_altpll:auto_generated|pll1
PLLJITTER	36
PLLSPEmax	40
PLLSPEmin	-40

