TR4_HDMI_TX_RX_SOPC | TR4_HDMI_TX_RX_SOPC 1.0

2011.12.21.20:03:04 | Generation Report

Output Directory | D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/
Files | D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/TR4_HDMI_TX_RX_SOPC.v (1066042 bytes VERILOG) D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_jtag_uart.v (24985 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_jtag_uart_input_mutex.dat (3 bytes OTHER)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_jtag_uart_input_stream.dat (10 bytes OTHER)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_jtag_uart_output_stream.dat (0 bytes OTHER)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_onchip_memory2.hex (688141 bytes HEX)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_onchip_memory2.v (4166 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_pll.v (11130 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_timer.v (7038 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_scl.v (2461 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_sda.v (2979 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_irq_n.v (3701 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_pio_led.v (2372 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_pio_button.v (3981 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_irq_n.v (2077 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_hpd_n.v (2444 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_cec.v (3014 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_edid_wp.v (2461 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TERASIC_I2S_TX.v (4340 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_avalon_mm_clock_crossing_bridge.v (10027 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_avalon_dc_fifo.v (23502 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_dcfifo_synchronizer_bundle.v (1434 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu.ocp (864 bytes OTHER)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu.sdc (4392 bytes SDC)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu.v (308728 bytes VERILOG_ENCRYPT)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu_ic_tag_ram.mif (1881 bytes MIF)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu_jtag_debug_module_sysclk.v (7286 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu_jtag_debug_module_tck.v (8704 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu_jtag_debug_module_wrapper.v (10757 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu_mult_cell.v (4784 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu_ociram_default_contents.mif (5878 bytes MIF)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu_oci_test_bench.v (1545 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu_rf_ram_a.mif (600 bytes MIF)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu_rf_ram_b.mif (600 bytes MIF)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cpu_test_bench.v (29734 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_sysid.v (1458 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_merlin_master_translator.sv (16415 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_merlin_slave_translator.sv (15976 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_merlin_master_agent.sv (8662 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_merlin_slave_agent.sv (17560 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_merlin_burst_uncompressor.sv (10392 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_avalon_sc_fifo.v (32198 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_addr_router.sv (6390 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_addr_router_001.sv (7480 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_id_router.sv (5930 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_id_router_002.sv (5861 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_addr_router_002.sv (12072 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_id_router_006.sv (5865 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_merlin_traffic_limiter.sv (13743 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_avalon_st_pipeline_base.v (4716 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_reset_controller.v (3592 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_reset_synchronizer.v (3564 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_reset_controller.sdc (1179 bytes SDC)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux.sv (4131 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux_001.sv (6679 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_merlin_arbitrator.sv (9448 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_mux.sv (12264 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux.sv (4125 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_002.sv (3501 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux.sv (12230 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux_001.sv (15630 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux_002.sv (17722 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006.sv (3506 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux_002.sv (30439 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.v (7493 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_avalon_st_clock_crosser.v (4900 bytes VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/TR4_HDMI_TX_RX_SOPC_irq_mapper.sv (2090 bytes SYSTEM_VERILOG)
D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_irq_clock_crosser.sv (1646 bytes SYSTEM_VERILOG)
Instantiations |

TR4_HDMI_TX_RX_SOPC TR4_HDMI_TX_RX_SOPC v1.0 | TR4_HDMI_TX_RX_SOPC_jtag_uart as jtag_uart TR4_HDMI_TX_RX_SOPC_onchip_memory2 as onchip_memory2 TR4_HDMI_TX_RX_SOPC_pll as pll TR4_HDMI_TX_RX_SOPC_timer as timer TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_scl as hdmi_tx_i2c_scl, hdmi_rx_i2c_scl, hdmi_tx_reset_n, hdmi_rx_reset_n, hdmi_rx_sync, hdmi_tx_mode_change
TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_sda as hdmi_tx_i2c_sda, hdmi_rx_i2c_sda, hdmi_rx0_ep_scl, hdmi_rx0_ep_sda, hdmi_rx1_ep_scl, hdmi_rx1_ep_sda
TR4_HDMI_TX_RX_SOPC_hdmi_tx_irq_n as hdmi_tx_irq_n
TR4_HDMI_TX_RX_SOPC_pio_led as pio_led, hdmi_tx_disp_mode
TR4_HDMI_TX_RX_SOPC_pio_button as pio_button
TR4_HDMI_TX_RX_SOPC_hdmi_rx_irq_n as hdmi_rx_irq_n
TR4_HDMI_TX_RX_SOPC_hdmi_rx_hpd_n as hdmi_rx_hpd_n, hdmi_tx_vpg_color
TR4_HDMI_TX_RX_SOPC_hdmi_rx_cec as hdmi_rx_cec
TR4_HDMI_TX_RX_SOPC_hdmi_rx_edid_wp as hdmi_rx_edid_wp
TERASIC_I2S_TX as i2s_tx
altera_avalon_mm_clock_crossing_bridge as clock_crossing_bridge
TR4_HDMI_TX_RX_SOPC_cpu as cpu
TR4_HDMI_TX_RX_SOPC_sysid as sysid
altera_merlin_master_translator as cpu_instruction_master_translator, cpu_data_master_translator, clock_crossing_bridge_m0_translator
altera_merlin_slave_translator as cpu_jtag_debug_module_translator, onchip_memory2_s1_translator, jtag_uart_avalon_jtag_slave_translator, pll_pll_slave_translator, i2s_tx_slave_translator, clock_crossing_bridge_s0_translator, timer_s1_translator, hdmi_tx_i2c_scl_s1_translator, hdmi_tx_i2c_sda_s1_translator, hdmi_rx_i2c_scl_s1_translator, hdmi_rx_i2c_sda_s1_translator, hdmi_tx_reset_n_s1_translator, hdmi_tx_irq_n_s1_translator, hdmi_rx_reset_n_s1_translator, pio_led_s1_translator, pio_button_s1_translator, sysid_control_slave_translator, hdmi_rx_irq_n_s1_translator, hdmi_rx_hpd_n_s1_translator, hdmi_rx_cec_s1_translator, hdmi_rx0_ep_scl_s1_translator, hdmi_rx0_ep_sda_s1_translator, hdmi_rx1_ep_scl_s1_translator, hdmi_rx1_ep_sda_s1_translator, hdmi_rx_sync_s1_translator, hdmi_tx_disp_mode_s1_translator, hdmi_tx_mode_change_s1_translator, hdmi_tx_vpg_color_s1_translator, hdmi_rx_edid_wp_s1_translator
altera_merlin_master_agent as cpu_instruction_master_translator_avalon_universal_master_0_agent, cpu_data_master_translator_avalon_universal_master_0_agent, clock_crossing_bridge_m0_translator_avalon_universal_master_0_agent
altera_merlin_slave_agent as cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent, onchip_memory2_s1_translator_avalon_universal_slave_0_agent, jtag_uart_avalon_jtag_slave_translator_avalon_universal_slave_0_agent, pll_pll_slave_translator_avalon_universal_slave_0_agent, i2s_tx_slave_translator_avalon_universal_slave_0_agent, clock_crossing_bridge_s0_translator_avalon_universal_slave_0_agent, timer_s1_translator_avalon_universal_slave_0_agent, hdmi_tx_i2c_scl_s1_translator_avalon_universal_slave_0_agent, hdmi_tx_i2c_sda_s1_translator_avalon_universal_slave_0_agent, hdmi_rx_i2c_scl_s1_translator_avalon_universal_slave_0_agent, hdmi_rx_i2c_sda_s1_translator_avalon_universal_slave_0_agent, hdmi_tx_reset_n_s1_translator_avalon_universal_slave_0_agent, hdmi_tx_irq_n_s1_translator_avalon_universal_slave_0_agent, hdmi_rx_reset_n_s1_translator_avalon_universal_slave_0_agent, pio_led_s1_translator_avalon_universal_slave_0_agent, pio_button_s1_translator_avalon_universal_slave_0_agent, sysid_control_slave_translator_avalon_universal_slave_0_agent, hdmi_rx_irq_n_s1_translator_avalon_universal_slave_0_agent, hdmi_rx_hpd_n_s1_translator_avalon_universal_slave_0_agent, hdmi_rx_cec_s1_translator_avalon_universal_slave_0_agent, hdmi_rx0_ep_scl_s1_translator_avalon_universal_slave_0_agent, hdmi_rx0_ep_sda_s1_translator_avalon_universal_slave_0_agent, hdmi_rx1_ep_scl_s1_translator_avalon_universal_slave_0_agent, hdmi_rx1_ep_sda_s1_translator_avalon_universal_slave_0_agent, hdmi_rx_sync_s1_translator_avalon_universal_slave_0_agent, hdmi_tx_disp_mode_s1_translator_avalon_universal_slave_0_agent, hdmi_tx_mode_change_s1_translator_avalon_universal_slave_0_agent, hdmi_tx_vpg_color_s1_translator_avalon_universal_slave_0_agent, hdmi_rx_edid_wp_s1_translator_avalon_universal_slave_0_agent
altera_avalon_sc_fifo as cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent_rsp_fifo, onchip_memory2_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, jtag_uart_avalon_jtag_slave_translator_avalon_universal_slave_0_agent_rsp_fifo, pll_pll_slave_translator_avalon_universal_slave_0_agent_rsp_fifo, pll_pll_slave_translator_avalon_universal_slave_0_agent_rdata_fifo, i2s_tx_slave_translator_avalon_universal_slave_0_agent_rsp_fifo, clock_crossing_bridge_s0_translator_avalon_universal_slave_0_agent_rsp_fifo, timer_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_tx_i2c_scl_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_tx_i2c_sda_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx_i2c_scl_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx_i2c_sda_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_tx_reset_n_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_tx_irq_n_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx_reset_n_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, pio_led_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, pio_button_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, sysid_control_slave_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx_irq_n_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx_hpd_n_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx_cec_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx0_ep_scl_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx0_ep_sda_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx1_ep_scl_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx1_ep_sda_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx_sync_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_tx_disp_mode_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_tx_mode_change_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_tx_vpg_color_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, hdmi_rx_edid_wp_s1_translator_avalon_universal_slave_0_agent_rsp_fifo
TR4_HDMI_TX_RX_SOPC_addr_router as addr_router
TR4_HDMI_TX_RX_SOPC_addr_router_001 as addr_router_001
TR4_HDMI_TX_RX_SOPC_id_router as id_router, id_router_001
TR4_HDMI_TX_RX_SOPC_id_router_002 as id_router_002, id_router_003, id_router_004, id_router_005
TR4_HDMI_TX_RX_SOPC_addr_router_002 as addr_router_002
TR4_HDMI_TX_RX_SOPC_id_router_006 as id_router_006, id_router_007, id_router_008, id_router_009, id_router_010, id_router_011, id_router_012, id_router_013, id_router_014, id_router_015, id_router_016, id_router_017, id_router_018, id_router_019, id_router_020, id_router_021, id_router_022, id_router_023, id_router_024, id_router_025, id_router_026, id_router_027, id_router_028
altera_merlin_traffic_limiter as limiter, limiter_001, limiter_002
altera_reset_controller as rst_controller, rst_controller_001, rst_controller_002
TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux as cmd_xbar_demux
TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux_001 as cmd_xbar_demux_001
TR4_HDMI_TX_RX_SOPC_cmd_xbar_mux as cmd_xbar_mux, cmd_xbar_mux_001
TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux as rsp_xbar_demux, rsp_xbar_demux_001
TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_002 as rsp_xbar_demux_002, rsp_xbar_demux_003, rsp_xbar_demux_004, rsp_xbar_demux_005
TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux as rsp_xbar_mux
TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux_001 as rsp_xbar_mux_001
TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux_002 as cmd_xbar_demux_002
TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006 as rsp_xbar_demux_006, rsp_xbar_demux_007, rsp_xbar_demux_008, rsp_xbar_demux_009, rsp_xbar_demux_010, rsp_xbar_demux_011, rsp_xbar_demux_012, rsp_xbar_demux_013, rsp_xbar_demux_014, rsp_xbar_demux_015, rsp_xbar_demux_016, rsp_xbar_demux_017, rsp_xbar_demux_018, rsp_xbar_demux_019, rsp_xbar_demux_020, rsp_xbar_demux_021, rsp_xbar_demux_022, rsp_xbar_demux_023, rsp_xbar_demux_024, rsp_xbar_demux_025, rsp_xbar_demux_026, rsp_xbar_demux_027, rsp_xbar_demux_028
TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux_002 as rsp_xbar_mux_002
altera_avalon_st_handshake_clock_crosser as crosser, crosser_001
TR4_HDMI_TX_RX_SOPC_irq_mapper as irq_mapper
altera_irq_clock_crosser as irq_synchronizer, irq_synchronizer_001, irq_synchronizer_002
TR4_HDMI_TX_RX_SOPC_jtag_uart altera_avalon_jtag_uart v11.0 |
TR4_HDMI_TX_RX_SOPC_onchip_memory2 altera_avalon_onchip_memory2 v11.0 |
TR4_HDMI_TX_RX_SOPC_pll altpll v11.0 |
TR4_HDMI_TX_RX_SOPC_timer altera_avalon_timer v11.0 |
TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_scl altera_avalon_pio v11.0 |
TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_sda altera_avalon_pio v11.0 |
TR4_HDMI_TX_RX_SOPC_hdmi_tx_irq_n altera_avalon_pio v11.0 |
TR4_HDMI_TX_RX_SOPC_pio_led altera_avalon_pio v11.0 |
TR4_HDMI_TX_RX_SOPC_pio_button altera_avalon_pio v11.0 |
TR4_HDMI_TX_RX_SOPC_hdmi_rx_irq_n altera_avalon_pio v11.0 |
TR4_HDMI_TX_RX_SOPC_hdmi_rx_hpd_n altera_avalon_pio v11.0 |
TR4_HDMI_TX_RX_SOPC_hdmi_rx_cec altera_avalon_pio v11.0 |
TR4_HDMI_TX_RX_SOPC_hdmi_rx_edid_wp altera_avalon_pio v11.0 |
TERASIC_I2S_TX terasic_i2s_tx v1.0 |
altera_avalon_mm_clock_crossing_bridge altera_avalon_mm_clock_crossing_bridge v11.0 |
TR4_HDMI_TX_RX_SOPC_cpu altera_nios2_qsys v11.0 |
TR4_HDMI_TX_RX_SOPC_sysid altera_avalon_sysid_qsys v11.0 |
altera_merlin_master_translator altera_merlin_master_translator v11.0 |
altera_merlin_slave_translator altera_merlin_slave_translator v11.0 |
altera_merlin_master_agent altera_merlin_master_agent v11.0 |
altera_merlin_slave_agent altera_merlin_slave_agent v11.0 |
altera_avalon_sc_fifo altera_avalon_sc_fifo v11.0 |
TR4_HDMI_TX_RX_SOPC_addr_router altera_merlin_router v11.0 |
TR4_HDMI_TX_RX_SOPC_addr_router_001 altera_merlin_router v11.0 |
TR4_HDMI_TX_RX_SOPC_id_router altera_merlin_router v11.0 |
TR4_HDMI_TX_RX_SOPC_id_router_002 altera_merlin_router v11.0 |
TR4_HDMI_TX_RX_SOPC_addr_router_002 altera_merlin_router v11.0 |
TR4_HDMI_TX_RX_SOPC_id_router_006 altera_merlin_router v11.0 |
altera_merlin_traffic_limiter altera_merlin_traffic_limiter v11.0 |
altera_reset_controller altera_reset_controller v11.0 |
TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux altera_merlin_demultiplexer v11.0 |
TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux_001 altera_merlin_demultiplexer v11.0 |
TR4_HDMI_TX_RX_SOPC_cmd_xbar_mux altera_merlin_multiplexer v11.0 |
TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux altera_merlin_demultiplexer v11.0 |
TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_002 altera_merlin_demultiplexer v11.0 |
TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux altera_merlin_multiplexer v11.0 |
TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux_001 altera_merlin_multiplexer v11.0 |
TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux_002 altera_merlin_demultiplexer v11.0 |
TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006 altera_merlin_demultiplexer v11.0 |
TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux_002 altera_merlin_multiplexer v11.0 |
altera_avalon_st_handshake_clock_crosser altera_avalon_st_handshake_clock_crosser v11.0 |
TR4_HDMI_TX_RX_SOPC_irq_mapper altera_irq_mapper v11.0 |
altera_irq_clock_crosser altera_irq_clock_crosser v11.0 |

Generation Messages
2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.onchip_memory2: Memory will be initialized from onchip_memory2.hex 2011.12.21.20:01:15 [Debug] TR4_HDMI_TX_RX_SOPC.pll: Timing: VAL:1/0.032s ELA:1/0.000s 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.hdmi_tx_i2c_sda: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.hdmi_rx_i2c_sda: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.hdmi_tx_irq_n: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.pio_button: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.hdmi_rx_irq_n: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.hdmi_rx_cec: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.hdmi_rx0_ep_scl: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.hdmi_rx0_ep_sda: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.hdmi_rx1_ep_scl: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.hdmi_rx1_ep_sda: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2011.12.21.20:01:15 [Debug] TR4_HDMI_TX_RX_SOPC.i2s_tx: Timing: QME:1/5.938s(5.0s) 2011.12.21.20:01:15 [Debug] TR4_HDMI_TX_RX_SOPC.clock_crossing_bridge: Timing: ELA:1/0.000s 2011.12.21.20:00:48 [Debug] TR4_HDMI_TX_RX_SOPC.altera_nios2_qsys: When a generate simulation callback is defined a synthesis generation callback should also be defined 2011.12.21.20:01:15 [Debug] TR4_HDMI_TX_RX_SOPC.cpu: Timing: VAL:1/0.046s ELA:1/0.000s 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.sysid: System ID will no longer be automatically assigned. 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC.sysid: Time stamp will be automatically updated when this component is generated. 2011.12.21.20:01:15 [Debug] TR4_HDMI_TX_RX_SOPC.sysid: Timing: VAL:2/0.008s/0.016s 2011.12.21.20:01:15 [Debug] TR4_HDMI_TX_RX_SOPC.c0: Timing: ELA:1/0.000s 2011.12.21.20:01:15 [Debug] TR4_HDMI_TX_RX_SOPC.c1: Timing: ELA:1/0.000s 2011.12.21.20:01:15 [Info] TR4_HDMI_TX_RX_SOPC: Generating TR4_HDMI_TX_RX_SOPC "TR4_HDMI_TX_RX_SOPC" for QUARTUS_SYNTH 2011.12.21.20:01:15 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 0 starting:TR4_HDMI_TX_RX_SOPC "TR4_HDMI_TX_RX_SOPC" 2011.12.21.20:01:16 [Debug] Transform: PipelineBridgeSwap 2011.12.21.20:01:16 [Info] pipeline_bridge_swap_transform: After transform: 32 modules, 128 connections 2011.12.21.20:01:16 [Debug] Transform: ClockCrossingBridgeSwap 2011.12.21.20:01:16 [Debug] Transform: QsysBetaIPSwap 2011.12.21.20:01:16 [Debug] Transform: CustomInstructionTransform 2011.12.21.20:01:16 [Info] No custom instruction connections, skipping transform 2011.12.21.20:01:16 [Debug] Transform: TristateConduitUpgradeTransform 2011.12.21.20:01:16 [Debug] Transform: TranslatorTransform 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:16 [Progress] min: 0 2011.12.21.20:01:16 [Progress] max: 1 2011.12.21.20:01:16 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Info] merlin_translator_transform: After transform: 64 modules, 256 connections 2011.12.21.20:01:17 [Debug] Transform: DomainTransform 2011.12.21.20:01:17 [Debug] Transform merlin_domain_transform not run on matched interfaces cpu.instruction_master and cpu_instruction_master_translator.avalon_anti_master_0 2011.12.21.20:01:17 [Debug] Transform merlin_domain_transform not run on matched interfaces cpu.data_master and cpu_data_master_translator.avalon_anti_master_0 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Progress] min: 0 2011.12.21.20:01:17 [Progress] max: 1 2011.12.21.20:01:17 [Progress] current: 1 2011.12.21.20:01:17 [Debug] Transform merlin_domain_transform not run on matched interfaces cpu_jtag_debug_module_translator.avalon_anti_slave_0 and cpu.jtag_debug_module 2011.12.21.20:01:17 [Debug] Transform merlin_domain_transform not run on matched interfaces onchip_memory2_s1_translator.avalon_anti_slave_0 and onchip_memory2.s1 2011.12.21.20:01:17 [Debug] Transform merlin_domain_transform not run on matched interfaces jtag_uart_avalon_jtag_slave_translator.avalon_anti_slave_0 and jtag_uart.avalon_jtag_slave 2011.12.21.20:01:17 [Debug] Transform merlin_domain_transform not run on matched interfaces pll_pll_slave_translator.avalon_anti_slave_0 and pll.pll_slave 2011.12.21.20:01:17 [Debug] Transform merlin_domain_transform not run on matched interfaces i2s_tx_slave_translator.avalon_anti_slave_0 and i2s_tx.slave 2011.12.21.20:01:17 [Debug] Transform merlin_domain_transform not run on matched interfaces clock_crossing_bridge_s0_translator.avalon_anti_slave_0 and clock_crossing_bridge.s0 2011.12.21.20:01:17 [Debug] Transform merlin_domain_transform not run on matched interfaces clock_crossing_bridge.m0 and clock_crossing_bridge_m0_translator.avalon_anti_master_0 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Progress] min: 0 2011.12.21.20:01:18 [Progress] max: 1 2011.12.21.20:01:18 [Progress] current: 1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces timer_s1_translator.avalon_anti_slave_0 and timer.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_tx_i2c_scl_s1_translator.avalon_anti_slave_0 and hdmi_tx_i2c_scl.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_tx_i2c_sda_s1_translator.avalon_anti_slave_0 and hdmi_tx_i2c_sda.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx_i2c_scl_s1_translator.avalon_anti_slave_0 and hdmi_rx_i2c_scl.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx_i2c_sda_s1_translator.avalon_anti_slave_0 and hdmi_rx_i2c_sda.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_tx_reset_n_s1_translator.avalon_anti_slave_0 and hdmi_tx_reset_n.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_tx_irq_n_s1_translator.avalon_anti_slave_0 and hdmi_tx_irq_n.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx_reset_n_s1_translator.avalon_anti_slave_0 and hdmi_rx_reset_n.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces pio_led_s1_translator.avalon_anti_slave_0 and pio_led.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces pio_button_s1_translator.avalon_anti_slave_0 and pio_button.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces sysid_control_slave_translator.avalon_anti_slave_0 and sysid.control_slave 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx_irq_n_s1_translator.avalon_anti_slave_0 and hdmi_rx_irq_n.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx_hpd_n_s1_translator.avalon_anti_slave_0 and hdmi_rx_hpd_n.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx_cec_s1_translator.avalon_anti_slave_0 and hdmi_rx_cec.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx0_ep_scl_s1_translator.avalon_anti_slave_0 and hdmi_rx0_ep_scl.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx0_ep_sda_s1_translator.avalon_anti_slave_0 and hdmi_rx0_ep_sda.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx1_ep_scl_s1_translator.avalon_anti_slave_0 and hdmi_rx1_ep_scl.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx1_ep_sda_s1_translator.avalon_anti_slave_0 and hdmi_rx1_ep_sda.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx_sync_s1_translator.avalon_anti_slave_0 and hdmi_rx_sync.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_tx_disp_mode_s1_translator.avalon_anti_slave_0 and hdmi_tx_disp_mode.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_tx_mode_change_s1_translator.avalon_anti_slave_0 and hdmi_tx_mode_change.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_tx_vpg_color_s1_translator.avalon_anti_slave_0 and hdmi_tx_vpg_color.s1 2011.12.21.20:01:18 [Debug] Transform merlin_domain_transform not run on matched interfaces hdmi_rx_edid_wp_s1_translator.avalon_anti_slave_0 and hdmi_rx_edid_wp.s1 2011.12.21.20:01:18 [Info] merlin_domain_transform: After transform: 128 modules, 691 connections 2011.12.21.20:01:18 [Debug] Transform: RouterTransform 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Progress] min: 0 2011.12.21.20:01:19 [Progress] max: 1 2011.12.21.20:01:19 [Progress] current: 1 2011.12.21.20:01:19 [Info] merlin_router_transform: After transform: 160 modules, 819 connections 2011.12.21.20:01:19 [Debug] Transform: TrafficLimiterTransform 2011.12.21.20:01:20 [Progress] min: 0 2011.12.21.20:01:20 [Progress] max: 1 2011.12.21.20:01:20 [Progress] current: 1 2011.12.21.20:01:20 [Progress] min: 0 2011.12.21.20:01:20 [Progress] max: 1 2011.12.21.20:01:20 [Progress] current: 1 2011.12.21.20:01:20 [Progress] min: 0 2011.12.21.20:01:20 [Progress] max: 1 2011.12.21.20:01:20 [Progress] current: 1 2011.12.21.20:01:20 [Info] merlin_traffic_limiter_transform: After transform: 163 modules, 834 connections 2011.12.21.20:01:20 [Debug] Transform: BurstTransform 2011.12.21.20:01:21 [Debug] Transform: ResetAdaptation 2011.12.21.20:01:21 [Progress] min: 0 2011.12.21.20:01:21 [Progress] max: 1 2011.12.21.20:01:21 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Info] reset_adaptation_transform: After transform: 166 modules, 652 connections 2011.12.21.20:01:22 [Debug] Transform: NetworkToSwitchTransform 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:22 [Progress] min: 0 2011.12.21.20:01:22 [Progress] max: 1 2011.12.21.20:01:22 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Progress] min: 0 2011.12.21.20:01:23 [Progress] max: 1 2011.12.21.20:01:23 [Progress] current: 1 2011.12.21.20:01:23 [Info] merlin_network_to_switch_transform: After transform: 228 modules, 778 connections 2011.12.21.20:01:23 [Debug] Transform: WidthTransform 2011.12.21.20:01:24 [Debug] Transform: RouterTableTransform 2011.12.21.20:01:25 [Debug] Transform: ClockCrossingTransform 2011.12.21.20:01:26 [Info] Inserting clock-crossing logic between cmd_xbar_demux_001.src3 and cmd_xbar_mux_003.sink0 2011.12.21.20:01:26 [Progress] min: 0 2011.12.21.20:01:26 [Progress] max: 1 2011.12.21.20:01:26 [Progress] current: 1 2011.12.21.20:01:26 [Info] Inserting clock-crossing logic between rsp_xbar_demux_003.src0 and rsp_xbar_mux_001.sink3 2011.12.21.20:01:26 [Progress] min: 0 2011.12.21.20:01:26 [Progress] max: 1 2011.12.21.20:01:26 [Progress] current: 1 2011.12.21.20:01:26 [Info] com_altera_sopcmodel_transforms_avalon_ClockCrossingTransform: After transform: 230 modules, 788 connections 2011.12.21.20:01:26 [Debug] Transform: TrafficLimiterUpdateTransform 2011.12.21.20:01:27 [Info] limiter_update_transform: After transform: 230 modules, 791 connections 2011.12.21.20:01:27 [Debug] Transform: InterruptMapperTransform 2011.12.21.20:01:27 [Progress] min: 0 2011.12.21.20:01:27 [Progress] max: 1 2011.12.21.20:01:27 [Progress] current: 1 2011.12.21.20:01:27 [Info] merlin_interrupt_mapper_transform: After transform: 231 modules, 794 connections 2011.12.21.20:01:27 [Debug] Transform: InterruptSyncTransform 2011.12.21.20:01:29 [Progress] min: 0 2011.12.21.20:01:29 [Progress] max: 1 2011.12.21.20:01:29 [Progress] current: 1 2011.12.21.20:01:29 [Progress] min: 0 2011.12.21.20:01:29 [Progress] max: 1 2011.12.21.20:01:29 [Progress] current: 1 2011.12.21.20:01:29 [Progress] min: 0 2011.12.21.20:01:29 [Progress] max: 1 2011.12.21.20:01:29 [Progress] current: 1 2011.12.21.20:01:29 [Info] merlin_interrupt_sync_transform: After transform: 234 modules, 809 connections 2011.12.21.20:01:29 [Debug] Transform: InterruptFanoutTransform 2011.12.21.20:01:30 [Warning] system: "No matching role found for jtag_uart:avalon_jtag_slave:dataavailable (dataavailable)" 2011.12.21.20:01:30 [Warning] system: "No matching role found for jtag_uart:avalon_jtag_slave:readyfordata (readyfordata)" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_jtag_uart "submodules/TR4_HDMI_TX_RX_SOPC_jtag_uart" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_onchip_memory2 "submodules/TR4_HDMI_TX_RX_SOPC_onchip_memory2" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altpll "submodules/TR4_HDMI_TX_RX_SOPC_pll" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_timer "submodules/TR4_HDMI_TX_RX_SOPC_timer" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_scl" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_sda" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_scl" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_sda" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_scl" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_irq_n" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_scl" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_pio_led" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_pio_button" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_irq_n" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_hpd_n" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_cec" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_sda" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_sda" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_sda" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_sda" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_scl" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_pio_led" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_scl" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_hpd_n" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_edid_wp" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses terasic_i2s_tx "submodules/TERASIC_I2S_TX" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_mm_clock_crossing_bridge "submodules/altera_avalon_mm_clock_crossing_bridge" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_nios2_qsys "submodules/TR4_HDMI_TX_RX_SOPC_cpu" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sysid_qsys "submodules/TR4_HDMI_TX_RX_SOPC_sysid" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_addr_router" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_addr_router_001" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_002" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_002" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_002" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_002" 2011.12.21.20:01:30 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_addr_router_002" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_reset_controller "submodules/altera_reset_controller" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_reset_controller "submodules/altera_reset_controller" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_reset_controller "submodules/altera_reset_controller" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux_001" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_multiplexer "submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_mux" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_multiplexer "submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_mux" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_002" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_002" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_002" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_002" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_multiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_multiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux_001" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux_002" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_merlin_multiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux_002" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_irq_mapper "submodules/TR4_HDMI_TX_RX_SOPC_irq_mapper" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_irq_clock_crosser "submodules/altera_irq_clock_crosser" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_irq_clock_crosser "submodules/altera_irq_clock_crosser" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: "TR4_HDMI_TX_RX_SOPC" reuses altera_irq_clock_crosser "submodules/altera_irq_clock_crosser" 2011.12.21.20:01:31 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 203 starting:altera_avalon_jtag_uart "submodules/TR4_HDMI_TX_RX_SOPC_jtag_uart" 2011.12.21.20:01:31 [Info] Starting classic module elaboration. 2011.12.21.20:01:32 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0002_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0002_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:01:35 [Info] Finished elaborating classic module. 2011.12.21.20:01:35 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0002_sopclgen/yysystem.ptf 2011.12.21.20:01:35 [Info] Running sopc_builder... 2011.12.21.20:01:35 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0002_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0002_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:01:37 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:01:37 [Progress] . 2011.12.21.20:01:39 [Progress] # 2011.12.21 20:01:39 (*) Success: sopc_builder finished. 2011.12.21.20:01:39 [Info] jtag_uart: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_jtag_uart "jtag_uart" 2011.12.21.20:01:39 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 202 starting:altera_avalon_onchip_memory2 "submodules/TR4_HDMI_TX_RX_SOPC_onchip_memory2" 2011.12.21.20:01:39 [Info] Starting classic module elaboration. 2011.12.21.20:01:40 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0003_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0003_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:01:41 [Info] Finished elaborating classic module. 2011.12.21.20:01:41 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0003_sopclgen/yysystem.ptf 2011.12.21.20:01:41 [Info] Running sopc_builder... 2011.12.21.20:01:42 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0003_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0003_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:01:43 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:01:44 [Progress] . 2011.12.21.20:01:46 [Progress] # 2011.12.21 20:01:46 (*) Success: sopc_builder finished. 2011.12.21.20:01:46 [Info] onchip_memory2: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_onchip_memory2 "onchip_memory2" 2011.12.21.20:01:46 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 201 starting:altpll "submodules/TR4_HDMI_TX_RX_SOPC_pll" 2011.12.21.20:01:46 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2011.12.21.20:01:46 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0004_sopcgen/TR4_HDMI_TX_RX_SOPC_pll.v --source=C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0004_sopcgen/TR4_HDMI_TX_RX_SOPC_pll.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0005_sopcqmap/ 2011.12.21.20:01:50 [Debug] Command took 3.781s 2011.12.21.20:01:50 [Info] pll: "TR4_HDMI_TX_RX_SOPC" instantiated altpll "pll" 2011.12.21.20:01:50 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 200 starting:altera_avalon_timer "submodules/TR4_HDMI_TX_RX_SOPC_timer" 2011.12.21.20:01:50 [Info] Starting classic module elaboration. 2011.12.21.20:01:51 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0006_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0006_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:01:53 [Info] Finished elaborating classic module. 2011.12.21.20:01:53 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0006_sopclgen/yysystem.ptf 2011.12.21.20:01:53 [Info] Running sopc_builder... 2011.12.21.20:01:53 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0006_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0006_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:01:55 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:01:55 [Progress] . 2011.12.21.20:01:56 [Progress] # 2011.12.21 20:01:56 (*) Success: sopc_builder finished. 2011.12.21.20:01:56 [Info] timer: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_timer "timer" 2011.12.21.20:01:56 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 199 starting:altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_scl" 2011.12.21.20:01:56 [Info] Starting classic module elaboration. 2011.12.21.20:01:57 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0007_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0007_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:01:58 [Info] Finished elaborating classic module. 2011.12.21.20:01:58 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0007_sopclgen/yysystem.ptf 2011.12.21.20:01:58 [Info] Running sopc_builder... 2011.12.21.20:01:59 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0007_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0007_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:00 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:02:01 [Progress] . 2011.12.21.20:02:02 [Progress] # 2011.12.21 20:02:02 (*) Success: sopc_builder finished. 2011.12.21.20:02:02 [Info] hdmi_tx_i2c_scl: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_pio "hdmi_tx_i2c_scl" 2011.12.21.20:02:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 198 starting:altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_i2c_sda" 2011.12.21.20:02:02 [Info] Starting classic module elaboration. 2011.12.21.20:02:03 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0008_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0008_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:04 [Info] Finished elaborating classic module. 2011.12.21.20:02:04 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0008_sopclgen/yysystem.ptf 2011.12.21.20:02:04 [Info] Running sopc_builder... 2011.12.21.20:02:05 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0008_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0008_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:07 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:02:07 [Progress] . 2011.12.21.20:02:08 [Progress] # 2011.12.21 20:02:08 (*) Success: sopc_builder finished. 2011.12.21.20:02:08 [Info] hdmi_tx_i2c_sda: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_pio "hdmi_tx_i2c_sda" 2011.12.21.20:02:08 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 194 starting:altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_tx_irq_n" 2011.12.21.20:02:08 [Info] Starting classic module elaboration. 2011.12.21.20:02:09 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0009_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0009_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:11 [Info] Finished elaborating classic module. 2011.12.21.20:02:11 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0009_sopclgen/yysystem.ptf 2011.12.21.20:02:11 [Info] Running sopc_builder... 2011.12.21.20:02:11 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0009_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0009_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:13 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:02:13 [Progress] . 2011.12.21.20:02:14 [Progress] # 2011.12.21 20:02:14 (*) Success: sopc_builder finished. 2011.12.21.20:02:14 [Info] hdmi_tx_irq_n: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_pio "hdmi_tx_irq_n" 2011.12.21.20:02:14 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 192 starting:altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_pio_led" 2011.12.21.20:02:14 [Info] Starting classic module elaboration. 2011.12.21.20:02:15 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0010_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0010_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:17 [Info] Finished elaborating classic module. 2011.12.21.20:02:17 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0010_sopclgen/yysystem.ptf 2011.12.21.20:02:17 [Info] Running sopc_builder... 2011.12.21.20:02:17 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0010_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0010_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:19 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:02:19 [Progress] . 2011.12.21.20:02:20 [Progress] # 2011.12.21 20:02:20 (*) Success: sopc_builder finished. 2011.12.21.20:02:20 [Info] pio_led: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_pio "pio_led" 2011.12.21.20:02:20 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 191 starting:altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_pio_button" 2011.12.21.20:02:20 [Info] Starting classic module elaboration. 2011.12.21.20:02:21 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0011_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0011_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:22 [Info] Finished elaborating classic module. 2011.12.21.20:02:22 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0011_sopclgen/yysystem.ptf 2011.12.21.20:02:22 [Info] Running sopc_builder... 2011.12.21.20:02:23 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0011_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0011_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:24 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:02:25 [Progress] . 2011.12.21.20:02:26 [Progress] # 2011.12.21 20:02:26 (*) Success: sopc_builder finished. 2011.12.21.20:02:26 [Info] pio_button: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_pio "pio_button" 2011.12.21.20:02:26 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 190 starting:altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_irq_n" 2011.12.21.20:02:26 [Info] Starting classic module elaboration. 2011.12.21.20:02:27 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0012_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0012_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:28 [Info] Finished elaborating classic module. 2011.12.21.20:02:28 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0012_sopclgen/yysystem.ptf 2011.12.21.20:02:28 [Info] Running sopc_builder... 2011.12.21.20:02:29 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0012_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0012_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:30 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:02:30 [Progress] . 2011.12.21.20:02:31 [Progress] # 2011.12.21 20:02:31 (*) Success: sopc_builder finished. 2011.12.21.20:02:32 [Info] hdmi_rx_irq_n: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_pio "hdmi_rx_irq_n" 2011.12.21.20:02:32 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 189 starting:altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_hpd_n" 2011.12.21.20:02:32 [Info] Starting classic module elaboration. 2011.12.21.20:02:32 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0013_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0013_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:34 [Info] Finished elaborating classic module. 2011.12.21.20:02:34 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0013_sopclgen/yysystem.ptf 2011.12.21.20:02:34 [Info] Running sopc_builder... 2011.12.21.20:02:35 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0013_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0013_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:36 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:02:36 [Progress] . 2011.12.21.20:02:37 [Progress] # 2011.12.21 20:02:37 (*) Success: sopc_builder finished. 2011.12.21.20:02:37 [Info] hdmi_rx_hpd_n: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_pio "hdmi_rx_hpd_n" 2011.12.21.20:02:37 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 188 starting:altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_cec" 2011.12.21.20:02:38 [Info] Starting classic module elaboration. 2011.12.21.20:02:38 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0014_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0014_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:40 [Info] Finished elaborating classic module. 2011.12.21.20:02:40 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0014_sopclgen/yysystem.ptf 2011.12.21.20:02:40 [Info] Running sopc_builder... 2011.12.21.20:02:40 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0014_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0014_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:42 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:02:42 [Progress] . 2011.12.21.20:02:43 [Progress] # 2011.12.21 20:02:43 (*) Success: sopc_builder finished. 2011.12.21.20:02:43 [Info] hdmi_rx_cec: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_pio "hdmi_rx_cec" 2011.12.21.20:02:43 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 179 starting:altera_avalon_pio "submodules/TR4_HDMI_TX_RX_SOPC_hdmi_rx_edid_wp" 2011.12.21.20:02:43 [Info] Starting classic module elaboration. 2011.12.21.20:02:44 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0015_sopclgen --no_splash --refresh C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0015_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:46 [Info] Finished elaborating classic module. 2011.12.21.20:02:46 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0015_sopclgen/yysystem.ptf 2011.12.21.20:02:46 [Info] Running sopc_builder... 2011.12.21.20:02:46 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0015_sopclgen --generate C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0015_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2011.12.21.20:02:48 [Progress] No .sopc_builder configuration file(!) 2011.12.21.20:02:48 [Progress] . 2011.12.21.20:02:49 [Progress] # 2011.12.21 20:02:49 (*) Success: sopc_builder finished. 2011.12.21.20:02:49 [Info] hdmi_rx_edid_wp: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_pio "hdmi_rx_edid_wp" 2011.12.21.20:02:49 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 178 starting:terasic_i2s_tx "submodules/TERASIC_I2S_TX" 2011.12.21.20:00:42 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2011.12.21.20:00:42 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/ip/TERASIC_I2S/TERASIC_I2S_TX.v --source=D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/ip/TERASIC_I2S/TERASIC_I2S_TX.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0001_sopcqmap/ 2011.12.21.20:00:48 [Debug] Command took 5.781s 2011.12.21.20:02:49 [Info] i2s_tx: "TR4_HDMI_TX_RX_SOPC" instantiated terasic_i2s_tx "i2s_tx" 2011.12.21.20:02:49 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 177 starting:altera_avalon_mm_clock_crossing_bridge "submodules/altera_avalon_mm_clock_crossing_bridge" 2011.12.21.20:02:49 [Info] clock_crossing_bridge: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_mm_clock_crossing_bridge "clock_crossing_bridge" 2011.12.21.20:02:49 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 176 starting:altera_nios2_qsys "submodules/TR4_HDMI_TX_RX_SOPC_cpu" 2011.12.21.20:02:49 [Info] cpu: Starting RTL generation for module 'TR4_HDMI_TX_RX_SOPC_cpu' 2011.12.21.20:02:49 [Info] cpu: Generation command is [exec C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/eperl.exe -I C:/altera/11.0/quartus/common/ip/altera/common/perl/5.8.3 -I C:/altera/11.0/quartus/sopc_builder/bin/europa -I C:/altera/11.0/quartus/sopc_builder/bin/perl_lib -I C:/altera/11.0/quartus/sopc_builder/bin -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/cpu_lib -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/nios_lib -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2 -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2 -- C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/generate_rtl.epl --name=TR4_HDMI_TX_RX_SOPC_cpu --dir=C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0016_cpu_gen/ --quartus_dir=C:/altera/11.0/quartus --verilog --config=C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/alt5329_9133872593259561777.dir/0016_cpu_gen//TR4_HDMI_TX_RX_SOPC_cpu_processor_configuration.pl --do_build_sim=0 --bogus ] 2011.12.21.20:03:01 [Info] cpu: # 2011.12.21 20:02:50 (*) Starting Nios II generation 2011.12.21.20:03:01 [Info] cpu: # 2011.12.21 20:02:50 (*) Checking for encrypted license (non-evaluation). 2011.12.21.20:03:01 [Info] cpu: # 2011.12.21 20:02:54 (*) Encrypted license found. SOF will not be time-limited. 2011.12.21.20:03:01 [Info] cpu: # 2011.12.21 20:02:54 (*) Elaborating CPU configuration settings 2011.12.21.20:03:01 [Info] cpu: # 2011.12.21 20:02:54 (*) Creating all objects for CPU 2011.12.21.20:03:01 [Info] cpu: # 2011.12.21 20:02:55 (*) Pipeline frontend 2011.12.21.20:03:01 [Info] cpu: # 2011.12.21 20:02:57 (*) Generating RTL from CPU objects 2011.12.21.20:03:01 [Info] cpu: # 2011.12.21 20:03:00 (*) Creating encrypted RTL 2011.12.21.20:03:01 [Info] cpu: # 2011.12.21 20:03:01 (*) Done Nios II generation 2011.12.21.20:03:01 [Info] cpu: Done RTL generation for module 'TR4_HDMI_TX_RX_SOPC_cpu' 2011.12.21.20:03:01 [Info] cpu: "TR4_HDMI_TX_RX_SOPC" instantiated altera_nios2_qsys "cpu" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 175 starting:altera_avalon_sysid_qsys "submodules/TR4_HDMI_TX_RX_SOPC_sysid" 2011.12.21.20:03:01 [Info] sysid: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_sysid_qsys "sysid" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 174 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2011.12.21.20:03:01 [Info] cpu_instruction_master_translator: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_master_translator "cpu_instruction_master_translator" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 172 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2011.12.21.20:03:01 [Info] cpu_jtag_debug_module_translator: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_slave_translator "cpu_jtag_debug_module_translator" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 142 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2011.12.21.20:03:01 [Info] cpu_instruction_master_translator_avalon_universal_master_0_agent: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_master_agent "cpu_instruction_master_translator_avalon_universal_master_0_agent" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 140 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2011.12.21.20:03:01 [Info] cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_slave_agent "cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 139 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2011.12.21.20:03:01 [Info] cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent_rsp_fifo: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_sc_fifo "cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent_rsp_fifo" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 80 starting:altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_addr_router" 2011.12.21.20:03:01 [Info] addr_router: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_router "addr_router" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 79 starting:altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_addr_router_001" 2011.12.21.20:03:01 [Info] addr_router_001: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_router "addr_router_001" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 78 starting:altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router" 2011.12.21.20:03:01 [Info] id_router: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_router "id_router" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 76 starting:altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_002" 2011.12.21.20:03:01 [Info] id_router_002: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_router "id_router_002" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 72 starting:altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_addr_router_002" 2011.12.21.20:03:01 [Info] addr_router_002: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_router "addr_router_002" 2011.12.21.20:03:01 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 71 starting:altera_merlin_router "submodules/TR4_HDMI_TX_RX_SOPC_id_router_006" 2011.12.21.20:03:02 [Info] id_router_006: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_router "id_router_006" 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 48 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2011.12.21.20:03:02 [Info] limiter: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_traffic_limiter "limiter" 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 45 starting:altera_reset_controller "submodules/altera_reset_controller" 2011.12.21.20:03:02 [Info] rst_controller: "TR4_HDMI_TX_RX_SOPC" instantiated altera_reset_controller "rst_controller" 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 42 starting:altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux" 2011.12.21.20:03:02 [Info] cmd_xbar_demux: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_demultiplexer "cmd_xbar_demux" 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 41 starting:altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux_001" 2011.12.21.20:03:02 [Info] cmd_xbar_demux_001: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_demultiplexer "cmd_xbar_demux_001" 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 40 starting:altera_merlin_multiplexer "submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_mux" 2011.12.21.20:03:02 [Info] cmd_xbar_mux: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_multiplexer "cmd_xbar_mux" 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 38 starting:altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux" 2011.12.21.20:03:02 [Info] rsp_xbar_demux: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_demultiplexer "rsp_xbar_demux" 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 36 starting:altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_002" 2011.12.21.20:03:02 [Info] rsp_xbar_demux_002: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_demultiplexer "rsp_xbar_demux_002" 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 32 starting:altera_merlin_multiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux" 2011.12.21.20:03:02 [Info] rsp_xbar_mux: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_multiplexer "rsp_xbar_mux" 2011.12.21.20:03:02 [Info] Reusing file D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_merlin_arbitrator.sv 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 31 starting:altera_merlin_multiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux_001" 2011.12.21.20:03:02 [Info] rsp_xbar_mux_001: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_multiplexer "rsp_xbar_mux_001" 2011.12.21.20:03:02 [Info] Reusing file D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_merlin_arbitrator.sv 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 30 starting:altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_cmd_xbar_demux_002" 2011.12.21.20:03:02 [Info] cmd_xbar_demux_002: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_demultiplexer "cmd_xbar_demux_002" 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 29 starting:altera_merlin_demultiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_demux_006" 2011.12.21.20:03:02 [Info] rsp_xbar_demux_006: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_demultiplexer "rsp_xbar_demux_006" 2011.12.21.20:03:02 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 6 starting:altera_merlin_multiplexer "submodules/TR4_HDMI_TX_RX_SOPC_rsp_xbar_mux_002" 2011.12.21.20:03:03 [Info] rsp_xbar_mux_002: "TR4_HDMI_TX_RX_SOPC" instantiated altera_merlin_multiplexer "rsp_xbar_mux_002" 2011.12.21.20:03:03 [Info] Reusing file D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_merlin_arbitrator.sv 2011.12.21.20:03:03 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 5 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" 2011.12.21.20:03:03 [Info] crosser: "TR4_HDMI_TX_RX_SOPC" instantiated altera_avalon_st_handshake_clock_crosser "crosser" 2011.12.21.20:03:03 [Info] Reusing file D:/Project/tr4_daught_card/tmp/test/TR4_HDMI_TX_RX/TR4_HDMI_TX_RX_SOPC/synthesis/submodules/altera_avalon_st_pipeline_base.v 2011.12.21.20:03:03 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 3 starting:altera_irq_mapper "submodules/TR4_HDMI_TX_RX_SOPC_irq_mapper" 2011.12.21.20:03:03 [Info] irq_mapper: "TR4_HDMI_TX_RX_SOPC" instantiated altera_irq_mapper "irq_mapper" 2011.12.21.20:03:03 [Debug] TR4_HDMI_TX_RX_SOPC: queue size: 2 starting:altera_irq_clock_crosser "submodules/altera_irq_clock_crosser" 2011.12.21.20:03:03 [Info] irq_synchronizer: "TR4_HDMI_TX_RX_SOPC" instantiated altera_irq_clock_crosser "irq_synchronizer" 2011.12.21.20:03:03 [Info] TR4_HDMI_TX_RX_SOPC: Done TR4_HDMI_TX_RX_SOPC" with 44 modules, 266 files, 5146818 bytes