PLL_Name	enet_tx_clk_pll:enet_tx_clk_pll|altpll:altpll_component|enet_tx_clk_pll_altpll:auto_generated|pll1
PLLJITTER	26
PLLSPEmax	40
PLLSPEmin	-40

PLL_Name	TR4_QSYS:u0|TR4_QSYS_altpll_0:altpll_0|TR4_QSYS_altpll_0_altpll_03c2:sd1|pll7
PLLJITTER	26
PLLSPEmax	40
PLLSPEmin	-40

PLL_Name	TR4_QSYS:u0|TR4_QSYS_uniphy_ddr3:uniphy_ddr3|TR4_QSYS_uniphy_ddr3_pll0:pll0|altpll:upll_memphy|altpll_0lj3:auto_generated|pll1
PLLJITTER	30
PLLSPEmax	40
PLLSPEmin	-40

