

module parallel20_prbs15 (

	clk,
	prbs_seed ,
	load ,
	//lsfr_out,
	dataout20
	);
	


input		clk ;
input	[10:0]	prbs_seed ;
input		load ;

output	[19:0]	dataout20 ;

/////////////////////////////////////////////////////////////////////////////
wire	[19:0] 	dataout20 ;
wire	[19:0]	prbs_seed ;

reg	[20:1]	temp 	;
reg	[20:1]	result ;
reg	[20:1]	prbs ; 




always @ ( prbs ) begin
	 temp	= #1 prbs ;

  begin : for_i_loop
	integer  i ;
	for(i=0; i<=19 ; i=i+1) begin: lsfrloop
	
		result	 	= #1 { temp[19:1], temp[15] ^ temp[14] } ;
		temp		= #1 result ;
	end
  end
end


always @ (posedge clk )
begin
  if ( load ) 
  	prbs	<= #1 prbs_seed ;
  else
	prbs	<= #1 result[20:1] ;
end

assign	dataout20 = prbs[20:1] ;



endmodule 



