Fitter Status : Successful - Thu Dec 15 13:32:40 2011
Quartus II Version : 11.0 Build 157 04/27/2011 SJ Full Version
Revision Name : TR4_XTS
Top-level Entity Name : TR4_XTS
Family : Stratix IV
Device : EP4SGX230KF40C2
Timing Models : Final
Logic utilization : 2 %
    Combinational ALUTs : 3,385 / 182,400 ( 2 % )
    Memory ALUTs : 0 / 91,200 ( 0 % )
    Dedicated logic registers : 1,547 / 182,400 ( 1 % )
Total registers : 1547
Total pins : 156 / 888 ( 18 % )
Total virtual pins : 0
Total block memory bits : 0 / 14,625,792 ( 0 % )
DSP block 18-bit elements : 0 / 1,288 ( 0 % )
Total GXB Receiver Channel PCS : 8 / 24 ( 33 % )
Total GXB Receiver Channel PMA : 8 / 36 ( 22 % )
Total GXB Transmitter Channel PCS : 8 / 24 ( 33 % )
Total GXB Transmitter Channel PMA : 8 / 36 ( 22 % )
Total PLLs : 2 / 8 ( 25 % )
Total DLLs : 0 / 4 ( 0 % )
