Analysis & Synthesis Status : Successful - Thu Dec 15 13:30:14 2011
Quartus II Version : 11.0 Build 157 04/27/2011 SJ Full Version
Revision Name : TR4_XTS
Top-level Entity Name : TR4_XTS
Family : Stratix IV
Logic utilization : N/A
    Combinational ALUTs : 3,377
    Memory ALUTs : 0
    Dedicated logic registers : 1,547
Total registers : 1547
Total pins : 132
Total virtual pins : 0
Total block memory bits : 0
DSP block 18-bit elements : 0
Total GXB Receiver Channel PCS : 8
Total GXB Receiver Channel PMA : 8
Total GXB Transmitter Channel PCS : 8
Total GXB Transmitter Channel PMA : 8
Total PLLs : 2
Total DLLs : 0
