subsys_niosv

2023.01.26.22:47:02 Datasheet
Overview
Processor
   cpu Abbotts Lake 22.3.0
All Components
   cpu intel_niosv_m 22.3.0
   jtag_uart altera_avalon_jtag_uart 19.2.0
   ram altera_avalon_onchip_memory2 19.3.6
Memory Map
  cpu
timer_sw_agent 
dm_agent 
  jtag_uart
avalon_jtag_slave 
  ram
s1 

cpu

intel_niosv_m v22.3.0
niosv_clk out_clk   cpu
  clk
niosv_rst_in out_reset  
  reset
niosv_issp_reset_in out_reset  
  reset
data_manager   jtag_uart
  avalon_jtag_slave
platform_irq_rx  
  irq
data_manager   ram
  s1
instruction_manager  
  s1


Parameters

generateLegacySim false
  

Software Assignments

CPU_FREQ 100000000u
DATA_ADDR_WIDTH 32
DCACHE_LINE_SIZE 0
DCACHE_LINE_SIZE_LOG2 0
DCACHE_SIZE 0
HAS_DEBUG_STUB
ICACHE_LINE_SIZE 0
ICACHE_LINE_SIZE_LOG2 0
ICACHE_SIZE 0
INST_ADDR_WIDTH 32
MTIME_OFFSET 0x00090000
NUM_GPR 32
RESET_ADDR 0x00000000
TICKS_PER_SEC no_quote(NIOSV_INTERNAL_TIMER_TICKS_PER_SECOND)
TIMER_DEVICE_TYPE 2

jtag_uart

altera_avalon_jtag_uart v19.2.0
cpu data_manager   jtag_uart
  avalon_jtag_slave
platform_irq_rx  
  irq
niosv_clk out_clk  
  clk
niosv_rst_in out_reset  
  reset
niosv_issp_reset_in out_reset  
  reset


Parameters

generateLegacySim false
  

Software Assignments

READ_DEPTH 64
READ_THRESHOLD 8
WRITE_DEPTH 64
WRITE_THRESHOLD 8

niosv_clk

altera_clock_bridge v19.2.0


Parameters

generateLegacySim false
  

Software Assignments

(none)

niosv_issp_reset_in

altera_reset_bridge v19.2.0
niosv_clk out_clk   niosv_issp_reset_in
  clk
out_reset   cpu
  reset
out_reset   jtag_uart
  reset
out_reset   ram
  reset1


Parameters

generateLegacySim false
  

Software Assignments

(none)

niosv_issp_reset_out

altera_in_system_sources_probes v19.2.1
niosv_clk out_clk   niosv_issp_reset_out
  source_clk


Parameters

generateLegacySim false
  

Software Assignments

(none)

niosv_rst_in

altera_reset_bridge v19.2.0
niosv_clk out_clk   niosv_rst_in
  clk
out_reset   cpu
  reset
out_reset   jtag_uart
  reset
out_reset   ram
  reset1


Parameters

generateLegacySim false
  

Software Assignments

(none)

ram

altera_avalon_onchip_memory2 v19.3.6
cpu data_manager   ram
  s1
instruction_manager  
  s1
niosv_clk out_clk  
  clk1
niosv_rst_in out_reset  
  reset1
niosv_issp_reset_in out_reset  
  reset1


Parameters

generateLegacySim false
  

Software Assignments

ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR 0
ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE 0
CONTENTS_INFO ""
DUAL_PORT 0
GUI_RAM_BLOCK_TYPE AUTO
INIT_CONTENTS_FILE ram_altera_avalon_onchip_memory2_inst
INIT_MEM_CONTENT 1
INSTANCE_ID NONE
NON_DEFAULT_INIT_FILE_ENABLED 0
RAM_BLOCK_TYPE AUTO
READ_DURING_WRITE_MODE DONT_CARE
SINGLE_CLOCK_OP 0
SIZE_MULTIPLE 1
SIZE_VALUE 262144
WRITABLE 1
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