syspll_mod_0 |
ETHERNET_FREQ_805_156 |
syspll_mod_1 |
Disabled |
syspll_mod_2 |
Disabled |
syspll_refclk_src_0 |
RefClk #0 |
syspll_refclk_src_1 |
RefClk #0 |
syspll_refclk_src_2 |
RefClk #0 |
syspll_freq_mhz_0 |
805.664062 |
syspll_freq_mhz_1 |
125 |
syspll_freq_mhz_2 |
125 |
syspll_availpor_0 |
true |
syspll_availpor_1 |
true |
syspll_availpor_2 |
true |
cmnpll_enable_0 |
false |
cmnpll_enable_1 |
false |
cmnpll_refclk_src_0 |
FHT RefClk #0 |
cmnpll_refclk_src_1 |
FHT RefClk #0 |
cmnpll_xtensa_src |
Auto |
refclk_fgt_output_enable_0 |
true |
refclk_fgt_usedby_0 |
PLL#0 |
refclk_fgt_freq_mhz_0 |
156.250000 |
refclk_fgt_output_enable_1 |
false |
refclk_fgt_freq_mhz_txt_1 |
156.250000 |
refclk_fgt_output_enable_2 |
false |
refclk_fgt_freq_mhz_txt_2 |
100 |
refclk_fgt_output_enable_3 |
false |
refclk_fgt_freq_mhz_txt_3 |
100 |
refclk_fgt_output_enable_4 |
false |
refclk_fgt_freq_mhz_txt_4 |
100 |
refclk_fgt_output_enable_5 |
false |
refclk_fgt_freq_mhz_txt_5 |
100 |
refclk_fgt_output_enable_6 |
false |
refclk_fgt_freq_mhz_txt_6 |
100 |
refclk_fgt_output_enable_7 |
false |
refclk_fgt_freq_mhz_txt_7 |
100 |
refclk_fgt_output_enable_8 |
false |
refclk_fgt_freq_mhz_txt_8 |
100 |
refclk_fgt_output_enable_9 |
false |
refclk_fgt_freq_mhz_txt_9 |
100 |
refclk_cdrclk_output_enable_0 |
false |
refclk_cdrclk_output_enable_1 |
false |
refclk_fht_freq_mhz_txt_0 |
156.250000 |
refclk_fht_freq_mhz_txt_1 |
156.250000 |
deviceFamily |
UNKNOWN |
generateLegacySim |
false |