Cylone V SoC FPGA Board Configuration



Pin Assignments:




Pin Assignment Table:



CLOCK
Name Location Direction Standard
OSC_50_B3B AF14 input 1.5 V
OSC_50_B4A AA16 input 1.5 V
OSC_50_B5B Y26 input 2.5 V
OSC_50_B8A K14 input 2.5 V



LED
Name Location Direction Standard
LED[0] AF10 output 3.3-V LVTTL
LED[1] AD10 output 3.3-V LVTTL
LED[2] AE11 output 3.3-V LVTTL
LED[3] AD7 output 3.3-V LVTTL



KEY
Name Location Direction Standard
KEY[0] AE9 input 3.3-V LVTTL
KEY[1] AE12 input 3.3-V LVTTL
KEY[2] AD9 input 3.3-V LVTTL
KEY[3] AD11 input 3.3-V LVTTL
RESET_n AD27 input 3.3-V LVTTL



SW
Name Location Direction Standard
SW[0] W25 input 2.5 V
SW[1] V25 input 2.5 V
SW[2] AC28 input 2.5 V
SW[3] AC29 input 2.5 V



Si5338
Name Location Direction Standard
SI5338_SCL AE26 output 3.3-V LVTTL
SI5338_SDA AJ29 inout 3.3-V LVTTL



Temperature
Name Location Direction Standard
TEMP_CS_n AF8 output 3.3-V LVTTL
TEMP_DIN AG7 output 3.3-V LVTTL
TEMP_DOUT AG1 input 3.3-V LVTTL
TEMP_SCLK AF9 output 3.3-V LVTTL



VGA
Name Location Direction Standard
VGA_HS AD12 output 3.3-V LVTTL
VGA_VS AC12 output 3.3-V LVTTL
VGA_SYNC_n AG2 output 3.3-V LVTTL
VGA_CLK W20 output 3.3-V LVTTL
VGA_BLANK_n AH3 output 3.3-V LVTTL
VGA_R[0] AG5 output 3.3-V LVTTL
VGA_R[1] AA12 output 3.3-V LVTTL
VGA_R[2] AB12 output 3.3-V LVTTL
VGA_R[3] AF6 output 3.3-V LVTTL
VGA_R[4] AG6 output 3.3-V LVTTL
VGA_R[5] AJ2 output 3.3-V LVTTL
VGA_R[6] AH5 output 3.3-V LVTTL
VGA_R[7] AJ1 output 3.3-V LVTTL
VGA_G[0] Y21 output 3.3-V LVTTL
VGA_G[1] AA25 output 3.3-V LVTTL
VGA_G[2] AB26 output 3.3-V LVTTL
VGA_G[3] AB22 output 3.3-V LVTTL
VGA_G[4] AB23 output 3.3-V LVTTL
VGA_G[5] AA24 output 3.3-V LVTTL
VGA_G[6] AB25 output 3.3-V LVTTL
VGA_G[7] AE27 output 3.3-V LVTTL
VGA_B[0] AE28 output 3.3-V LVTTL
VGA_B[1] Y23 output 3.3-V LVTTL
VGA_B[2] Y24 output 3.3-V LVTTL
VGA_B[3] AG28 output 3.3-V LVTTL
VGA_B[4] AF28 output 3.3-V LVTTL
VGA_B[5] V23 output 3.3-V LVTTL
VGA_B[6] W24 output 3.3-V LVTTL
VGA_B[7] AF29 output 3.3-V LVTTL



Audio
Name Location Direction Standard
AUD_ADCLRCK AG30 inout 3.3-V LVTTL
AUD_ADCDAT AC27 input 3.3-V LVTTL
AUD_DACLRCK AH4 inout 3.3-V LVTTL
AUD_DACDAT AG3 output 3.3-V LVTTL
AUD_XCK AC9 output 3.3-V LVTTL
AUD_BCLK AE7 inout 3.3-V LVTTL
AUD_MUTE AD26 output 3.3-V LVTTL



I2C for Audio
Name Location Direction Standard
AUD_I2C_SCLK AH30 output 3.3-V LVTTL
AUD_I2C_SDAT AF30 inout 3.3-V LVTTL



IR Receiver
Name Location Direction Standard
IRDA_RXD AH2 input 3.3-V LVTTL



SDRAM
Name Location Direction Standard
DDR3_CK_p AA14 output Differential 1.5-V SSTL Class I
DDR3_CK_n AA15 output Differential 1.5-V SSTL Class I
DDR3_DQS_p[0] V16 inout Differential 1.5-V SSTL Class I
DDR3_DQS_n[0] W16 inout Differential 1.5-V SSTL Class I
DDR3_DQS_p[1] V17 inout Differential 1.5-V SSTL Class I
DDR3_DQS_n[1] W17 inout Differential 1.5-V SSTL Class I
DDR3_DQS_p[2] Y17 inout Differential 1.5-V SSTL Class I
DDR3_DQS_n[2] AA18 inout Differential 1.5-V SSTL Class I
DDR3_DQS_p[3] AC20 inout Differential 1.5-V SSTL Class I
DDR3_DQS_n[3] AD19 inout Differential 1.5-V SSTL Class I
DDR3_CKE AJ21 output SSTL-15 Class I
DDR3_CS_n AB15 output SSTL-15 Class I
DDR3_RESET_n AK21 output SSTL-15 Class I
DDR3_WE_n AJ6 output SSTL-15 Class I
DDR3_RAS_n AH8 output SSTL-15 Class I
DDR3_CAS_n AH7 output SSTL-15 Class I
DDR3_BA[0] AH10 output SSTL-15 Class I
DDR3_BA[1] AJ11 output SSTL-15 Class I
DDR3_BA[2] AK11 output SSTL-15 Class I
DDR3_DM[0] AH17 output SSTL-15 Class I
DDR3_DM[1] AG23 output SSTL-15 Class I
DDR3_DM[2] AK23 output SSTL-15 Class I
DDR3_DM[3] AJ27 output SSTL-15 Class I
DDR3_ODT AE16 output SSTL-15 Class I
DDR3_RZQ AG17 input 1.5 V
DDR3_DQ[0] AF18 inout SSTL-15 Class I
DDR3_DQ[1] AE17 inout SSTL-15 Class I
DDR3_DQ[2] AG16 inout SSTL-15 Class I
DDR3_DQ[3] AF16 inout SSTL-15 Class I
DDR3_DQ[4] AH20 inout SSTL-15 Class I
DDR3_DQ[5] AG21 inout SSTL-15 Class I
DDR3_DQ[6] AJ16 inout SSTL-15 Class I
DDR3_DQ[7] AH18 inout SSTL-15 Class I
DDR3_DQ[8] AK18 inout SSTL-15 Class I
DDR3_DQ[9] AJ17 inout SSTL-15 Class I
DDR3_DQ[10] AG18 inout SSTL-15 Class I
DDR3_DQ[11] AK19 inout SSTL-15 Class I
DDR3_DQ[12] AG20 inout SSTL-15 Class I
DDR3_DQ[13] AF19 inout SSTL-15 Class I
DDR3_DQ[14] AJ20 inout SSTL-15 Class I
DDR3_DQ[15] AH24 inout SSTL-15 Class I
DDR3_DQ[16] AE19 inout SSTL-15 Class I
DDR3_DQ[17] AE18 inout SSTL-15 Class I
DDR3_DQ[18] AG22 inout SSTL-15 Class I
DDR3_DQ[19] AK22 inout SSTL-15 Class I
DDR3_DQ[20] AF21 inout SSTL-15 Class I
DDR3_DQ[21] AF20 inout SSTL-15 Class I
DDR3_DQ[22] AH23 inout SSTL-15 Class I
DDR3_DQ[23] AK24 inout SSTL-15 Class I
DDR3_DQ[24] AF24 inout SSTL-15 Class I
DDR3_DQ[25] AF23 inout SSTL-15 Class I
DDR3_DQ[26] AJ24 inout SSTL-15 Class I
DDR3_DQ[27] AK26 inout SSTL-15 Class I
DDR3_DQ[28] AE23 inout SSTL-15 Class I
DDR3_DQ[29] AE22 inout SSTL-15 Class I
DDR3_DQ[30] AG25 inout SSTL-15 Class I
DDR3_DQ[31] AK27 inout SSTL-15 Class I
DDR3_A[0] AJ14 output SSTL-15 Class I
DDR3_A[1] AK14 output SSTL-15 Class I
DDR3_A[2] AH12 output SSTL-15 Class I
DDR3_A[3] AJ12 output SSTL-15 Class I
DDR3_A[4] AG15 output SSTL-15 Class I
DDR3_A[5] AH15 output SSTL-15 Class I
DDR3_A[6] AK12 output SSTL-15 Class I
DDR3_A[7] AK13 output SSTL-15 Class I
DDR3_A[8] AH13 output SSTL-15 Class I
DDR3_A[9] AH14 output SSTL-15 Class I
DDR3_A[10] AJ9 output SSTL-15 Class I
DDR3_A[11] AK9 output SSTL-15 Class I
DDR3_A[12] AK7 output SSTL-15 Class I
DDR3_A[13] AK8 output SSTL-15 Class I
DDR3_A[14] AG12 output SSTL-15 Class I



HSMC connect to ADA - High Speed ADC/DAC
Name Location Direction Standard HSMC Pin Index
ADA_SDA AE29 inout 2.5 V 33
ADA_SCL AA28 output 2.5 V 34
DAC_DA[0] A9 output 2.5 V 47
DAC_DB[0] G12 output 2.5 V 48
DAC_DA[1] A8 output 2.5 V 49
DAC_DB[1] G11 output 2.5 V 50
DAC_DA[2] E8 output 2.5 V 53
DAC_DB[2] K12 output 2.5 V 54
DAC_DA[3] D7 output 2.5 V 55
DAC_DB[3] J12 output 2.5 V 56
DAC_DA[4] G7 output 2.5 V 59
DAC_DB[4] G10 output 2.5 V 60
DAC_DA[5] F6 output 2.5 V 61
DAC_DB[5] F10 output 2.5 V 62
DAC_DA[6] D6 output 2.5 V 65
DAC_DB[6] J10 output 2.5 V 66
DAC_DA[7] C5 output 2.5 V 67
DAC_DB[7] J9 output 2.5 V 68
DAC_DA[8] D5 output 2.5 V 71
DAC_DB[8] K7 output 2.5 V 72
DAC_DA[9] C4 output 2.5 V 73
DAC_DB[9] K8 output 2.5 V 74
DAC_DA[10] E3 output 2.5 V 77
DAC_DB[10] J7 output 2.5 V 78
DAC_DA[11] E2 output 2.5 V 79
DAC_DB[11] H7 output 2.5 V 80
DAC_DA[12] E4 output 2.5 V 83
DAC_DB[12] H8 output 2.5 V 84
DAC_DA[13] D4 output 2.5 V 85
DAC_DB[13] G8 output 2.5 V 86
DAC_WRT_A C3 output 2.5 V 89
DAC_WRT_B F9 output 2.5 V 90
DAC_MODE B3 output 2.5 V 91
DAC_CLK_A E7 output 2.5 V 95
OSC_SMA_ADC4 AA26 input 2.5 V 96
DAC_CLK_B E6 output 2.5 V 97
SMA_DAC4 AB27 input 2.5 V 98
ADC_OEB_A B6 output 2.5 V 108
ADC_OEB_B B5 output 2.5 V 110
ADC_DB[13] B2 input 2.5 V 113
ADC_DA[13] E9 input 2.5 V 114
ADC_DB[12] B1 input 2.5 V 115
ADC_DA[12] D9 input 2.5 V 116
ADC_DB[11] A4 input 2.5 V 119
ADC_DA[11] E12 input 2.5 V 120
ADC_DB[10] A3 input 2.5 V 121
ADC_DA[10] D12 input 2.5 V 122
ADC_DB[9] A6 input 2.5 V 125
ADC_DA[9] D11 input 2.5 V 126
ADC_DB[8] A5 input 2.5 V 127
ADC_DA[8] D10 input 2.5 V 128
ADC_DB[7] C7 input 2.5 V 131
ADC_DA[7] C13 input 2.5 V 132
ADC_DB[6] B7 input 2.5 V 133
ADC_DA[6] B12 input 2.5 V 134
ADC_DB[5] C8 input 2.5 V 137
ADC_DA[5] F13 input 2.5 V 138
ADC_DB[4] B8 input 2.5 V 139
ADC_DA[4] E13 input 2.5 V 140
ADC_DB[3] C12 input 2.5 V 143
ADC_DA[3] H14 input 2.5 V 144
ADC_DB[2] B11 input 2.5 V 145
ADC_DA[2] G13 input 2.5 V 146
ADC_DB[1] B13 input 2.5 V 149
ADC_DA[1] F15 input 2.5 V 150
ADC_DB[0] A13 input 2.5 V 151
ADC_DA[0] F14 input 2.5 V 152
ADC_CLK_B A11 output 2.5 V 155
ADC_OTR_B H15 input 2.5 V 156
ADC_CLK_A A10 output 2.5 V 157
ADC_OTR_A G15 input 2.5 V 158