  //Example instantiation for system 'ddr2_multi_port'
  ddr2_multi_port ddr2_multi_port_inst
    (
      .aux_scan_clk_from_the_ddr2          (aux_scan_clk_from_the_ddr2),
      .aux_scan_clk_reset_n_from_the_ddr2  (aux_scan_clk_reset_n_from_the_ddr2),
      .c_state_flush_from_the_Write_Port0  (c_state_flush_from_the_Write_Port0),
      .c_state_from_the_Read_Port0         (c_state_from_the_Read_Port0),
      .c_state_from_the_Write_Port0        (c_state_from_the_Write_Port0),
      .clk_50                              (clk_50),
      .ddr2_aux_full_rate_clk_out          (ddr2_aux_full_rate_clk_out),
      .ddr2_aux_half_rate_clk_out          (ddr2_aux_half_rate_clk_out),
      .ddr2_phy_clk_out                    (ddr2_phy_clk_out),
      .dll_reference_clk_from_the_ddr2     (dll_reference_clk_from_the_ddr2),
      .dqs_delay_ctrl_export_from_the_ddr2 (dqs_delay_ctrl_export_from_the_ddr2),
      .error_from_the_Read_Port0           (error_from_the_Read_Port0),
      .global_reset_n_to_the_ddr2          (global_reset_n_to_the_ddr2),
      .iCLK_F_to_the_Read_Port0            (iCLK_F_to_the_Read_Port0),
      .iCLK_F_to_the_Write_Port0           (iCLK_F_to_the_Write_Port0),
      .iFLUSH_REQ_F_to_the_Write_Port0     (iFLUSH_REQ_F_to_the_Write_Port0),
      .iIP_INIT_DONE_to_the_Read_Port0     (iIP_INIT_DONE_to_the_Read_Port0),
      .iIP_INIT_DONE_to_the_Write_Port0    (iIP_INIT_DONE_to_the_Write_Port0),
      .iREAD_ACK_F_to_the_Read_Port0       (iREAD_ACK_F_to_the_Read_Port0),
      .iRST_n_F_to_the_Read_Port0          (iRST_n_F_to_the_Read_Port0),
      .iRST_n_F_to_the_Write_Port0         (iRST_n_F_to_the_Write_Port0),
      .iWRITE_DATA_F_to_the_Write_Port0    (iWRITE_DATA_F_to_the_Write_Port0),
      .iWRITE_F_to_the_Write_Port0         (iWRITE_F_to_the_Write_Port0),
      .local_init_done_from_the_ddr2       (local_init_done_from_the_ddr2),
      .local_refresh_ack_from_the_ddr2     (local_refresh_ack_from_the_ddr2),
      .local_wdata_req_from_the_ddr2       (local_wdata_req_from_the_ddr2),
      .mem_addr_from_the_ddr2              (mem_addr_from_the_ddr2),
      .mem_ba_from_the_ddr2                (mem_ba_from_the_ddr2),
      .mem_cas_n_from_the_ddr2             (mem_cas_n_from_the_ddr2),
      .mem_cke_from_the_ddr2               (mem_cke_from_the_ddr2),
      .mem_clk_n_to_and_from_the_ddr2      (mem_clk_n_to_and_from_the_ddr2),
      .mem_clk_to_and_from_the_ddr2        (mem_clk_to_and_from_the_ddr2),
      .mem_cs_n_from_the_ddr2              (mem_cs_n_from_the_ddr2),
      .mem_dm_from_the_ddr2                (mem_dm_from_the_ddr2),
      .mem_dq_to_and_from_the_ddr2         (mem_dq_to_and_from_the_ddr2),
      .mem_dqs_to_and_from_the_ddr2        (mem_dqs_to_and_from_the_ddr2),
      .mem_dqsn_to_and_from_the_ddr2       (mem_dqsn_to_and_from_the_ddr2),
      .mem_odt_from_the_ddr2               (mem_odt_from_the_ddr2),
      .mem_ras_n_from_the_ddr2             (mem_ras_n_from_the_ddr2),
      .mem_we_n_from_the_ddr2              (mem_we_n_from_the_ddr2),
      .oEMPTY_F_from_the_Read_Port0        (oEMPTY_F_from_the_Read_Port0),
      .oFLUSH_BUSY_F_from_the_Write_Port0  (oFLUSH_BUSY_F_from_the_Write_Port0),
      .oFULL_F_from_the_Write_Port0        (oFULL_F_from_the_Write_Port0),
      .oPORT_READY_F_from_the_Read_Port0   (oPORT_READY_F_from_the_Read_Port0),
      .oREAD_DATA_F_from_the_Read_Port0    (oREAD_DATA_F_from_the_Read_Port0),
      .oct_ctl_rs_value_to_the_ddr2        (oct_ctl_rs_value_to_the_ddr2),
      .oct_ctl_rt_value_to_the_ddr2        (oct_ctl_rt_value_to_the_ddr2),
      .reset_n                             (reset_n),
      .reset_phy_clk_n_from_the_ddr2       (reset_phy_clk_n_from_the_ddr2),
      .wrusedw_from_the_Write_Port0        (wrusedw_from_the_Write_Port0)
    );

