Fitter Status : Successful - Thu Dec 15 14:04:27 2011
Quartus II Version : 11.0 Build 157 04/27/2011 SJ Full Version
Revision Name : Tr4_DVI
Top-level Entity Name : Tr4_DVI
Family : Stratix IV
Device : EP4SGX230KF40C2
Timing Models : Final
Logic utilization : 1 %
    Combinational ALUTs : 1,063 / 182,400 ( 1 % )
    Memory ALUTs : 0 / 91,200 ( 0 % )
    Dedicated logic registers : 1,406 / 182,400 ( 1 % )
Total registers : 1406
Total pins : 98 / 888 ( 11 % )
Total virtual pins : 0
Total block memory bits : 1,541,140 / 14,625,792 ( 11 % )
DSP block 18-bit elements : 0 / 1,288 ( 0 % )
Total GXB Receiver Channel PCS : 0 / 24 ( 0 % )
Total GXB Receiver Channel PMA : 0 / 36 ( 0 % )
Total GXB Transmitter Channel PCS : 0 / 24 ( 0 % )
Total GXB Transmitter Channel PMA : 0 / 36 ( 0 % )
Total PLLs : 2 / 8 ( 25 % )
Total DLLs : 0 / 4 ( 0 % )
