ep_g3x8_avmm256_integrated_mm_clock_crossing_bridge_ddr4_b
2019.09.17.11:46:47
Datasheet
Overview
All Components
mm_clock_crossing_bridge_ddr4_b
altera_avalon_mm_clock_crossing_bridge 19.1
Memory Map
mm_clock_crossing_bridge_ddr4_b
altera_avalon_mm_clock_crossing_bridge v19.1
Parameters
DATA_WIDTH
512
SYMBOL_WIDTH
8
ADDRESS_WIDTH
10
USE_AUTO_ADDRESS_WIDTH
1
AUTO_ADDRESS_WIDTH
32
ADDRESS_UNITS
SYMBOLS
MAX_BURST_SIZE
128
COMMAND_FIFO_DEPTH
32
RESPONSE_FIFO_DEPTH
512
MASTER_SYNC_DEPTH
2
SLAVE_SYNC_DEPTH
2
deviceFamily
UNKNOWN
generateLegacySim
false
Software Assignments
(none)
generation took 0.00 seconds
rendering took 0.00 seconds