TR4_SOPC | TR4_SOPC
1.0 |
2011.12.30.15:41:34 | Generation Report |
Output Directory | D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/ | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Files | D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/TR4_SOPC.v (331779 bytes VERILOG)
D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_onchip_memory2.hex (5505088 bytes HEX) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_onchip_memory2.v (4043 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_jtag_uart.v (23819 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_jtag_uart_input_mutex.dat (3 bytes OTHER) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_jtag_uart_input_stream.dat (10 bytes OTHER) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_jtag_uart_output_stream.dat (0 bytes OTHER) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_altpll_0.v (11061 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu.ocp (848 bytes OTHER) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu.sdc (4109 bytes SDC) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu.v (448904 bytes VERILOG_ENCRYPT) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_bht_ram.mif (2392 bytes MIF) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_dc_tag_ram.mif (920 bytes MIF) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_ic_tag_ram.mif (1881 bytes MIF) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_jtag_debug_module_sysclk.v (7033 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_jtag_debug_module_tck.v (8319 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_jtag_debug_module_wrapper.v (10163 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_mult_cell.v (3607 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_ociram_default_contents.mif (5714 bytes MIF) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_oci_test_bench.v (1468 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_rf_ram_a.mif (600 bytes MIF) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_rf_ram_b.mif (600 bytes MIF) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cpu_test_bench.v (31415 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_sysid.v (1447 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_tri_state_bridge_bridge_0.sv (5436 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_tri_state_bridge_pinSharer_0.v (4568 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_tri_state_bridge_pinSharer_0_pin_sharer.sv (4062 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_merlin_std_arbitrator_core.sv (8937 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_tri_state_bridge_pinSharer_0_arbiter.sv (2869 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cfi_flash.v (28098 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_tristate_controller_translator.sv (7099 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_merlin_slave_translator.sv (16040 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_tristate_controller_aggregator.sv (9382 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_merlin_master_translator.sv (16799 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_merlin_slave_agent.sv (19129 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_merlin_burst_uncompressor.sv (10370 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_avalon_sc_fifo.v (32228 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_merlin_master_agent.sv (8683 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_addr_router.sv (6726 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_addr_router_001.sv (7527 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_id_router.sv (6033 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_id_router_002.sv (6045 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_id_router_003.sv (5964 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_merlin_traffic_limiter.sv (12799 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_avalon_st_pipeline_base.v (4716 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_merlin_burst_adapter.sv (37061 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_reset_controller.v (3592 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_reset_synchronizer.v (3561 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_reset_controller.sdc (1179 bytes SDC) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cmd_xbar_demux.sv (4744 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cmd_xbar_demux_001.sv (6657 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_merlin_arbitrator.sv (9460 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_cmd_xbar_mux.sv (11835 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_rsp_xbar_demux.sv (4103 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_rsp_xbar_demux_003.sv (3479 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_rsp_xbar_mux.sv (12038 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_rsp_xbar_mux_001.sv (14464 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_merlin_width_adapter.sv (35858 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.v (7493 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_avalon_st_clock_crosser.v (4900 bytes VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/TR4_SOPC_irq_mapper.sv (1737 bytes SYSTEM_VERILOG) D:/SVN/tr4/cd/demonstrations/tr4_530/tr4_default_flash_loader/TR4_SOPC/synthesis/submodules/altera_irq_clock_crosser.sv (1648 bytes SYSTEM_VERILOG) |
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Instantiations |
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